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Build an NFC (RFID) card reader using FPGA and simple circuit instead of RFID-specfic chip. 用FPGA+分立器件电路搭建一个NFC(RFID)读卡器,不需要专门的RFID芯片。

Home Page: https://gitee.com/wangxuan95/FPGA-NFC

License: GNU General Public License v3.0

Batchfile 0.16% Verilog 99.84%
rfid nfc fpga verilog systemverilog iso14443 iso14443a

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fpga-nfc's Issues

关于remainb的问题

王轩博士您好:
首先非常感谢优质的开源项目,为初学者提高能力提供了可能。目前我有一个小疑问:
在nfca_tx_frame.sv中,remainb怎么计算的?我的理解是它应当与tx_tdatab和为8,但是代码中好像描述的并不是这个意思。
非常期待您的回答。

ADC bit width and sample rate

Hi,

After reviewing a bit the HW schematic, there are couple of questions come to my mind.

  1. NFC usually only require bandwidth of 14kHz so if we filter and demodulate the incoming signal after the narrow band filter. The ADC Nyquist bandwidth should only require less than 100kHz?

  2. As this example is using 3MSPS then this also raise a question that the incoming signal is filtered via CIC / IIR / FIR? As we just need a delta in ASK?

I am not sure these questions are incorrect or hard but I guess this could help other developers.

Bests,
Brian

ENJOY~

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