Topic: microarchitecture Goto Github
Some thing interesting about microarchitecture
Some thing interesting about microarchitecture
microarchitecture,A real time computing machine
User: 8shubham
microarchitecture,Java bindings for Google cpu_features
User: aecsocket
microarchitecture,X86 CPU topics overview for developers , oriented towards performance
User: akhin
Home Page: https://github.com/akhin/microarchitecture-cheatsheet/blob/main/microarchitecture-cheatsheet.pdf
microarchitecture,
User: alilrs
microarchitecture,MIPS Single-Cycle Microarchitecture Processor
User: amir-shamsi
microarchitecture,Performance Counter Measurements at the cycle granularity
User: b-shi
microarchitecture,A speculative mechanism to accelerate long-latency off-chip load requests by removing on-chip cache access latency from their critical path, as described by MICRO 2022 paper by Bera et al. (https://arxiv.org/pdf/2209.00188.pdf)
Organization: cmu-safari
Home Page: https://arxiv.org/abs/2209.00188
microarchitecture,A customizable hardware prefetching framework using online reinforcement learning as described in the MICRO 2021 paper by Bera et al. (https://arxiv.org/pdf/2109.12021.pdf).
Organization: cmu-safari
Home Page: https://arxiv.org/pdf/2109.12021.pdf
microarchitecture,Microarchitectural exploitation and other hardware attacks.
User: codexlynx
microarchitecture,A small RISC-V core (SystemVerilog)
User: dmitriy0111
microarchitecture,A small RISC-V core (VHDL)
User: dmitriy0111
microarchitecture,16-bit RISC processor with von Neumann architecture
User: dominiksalvet
microarchitecture,Dual-core 16-bit RISC processor
User: dominiksalvet
microarchitecture,My first processor written in HDL language
User: dominiksalvet
microarchitecture,Custom 64-bit pipelined RISC processor
User: dominiksalvet
microarchitecture,Accumulator-based 4-bit processor
User: dominiksalvet
microarchitecture,8-bit MISC processor with pipelining
User: dominiksalvet
microarchitecture,Achieve peak performance on x86 CPUs and NVIDIA GPUs
User: dr-noob
microarchitecture,Implementation of QuAC v1.0 ISA microarchitecture called CBox16
User: engineersbox
microarchitecture,Implementation of a custom GPU ISA microarchitecture called GBox16 based around NVIDIA and AMD microarchitectures
User: engineersbox
microarchitecture,One Instruction Set Computer
User: evanlissoos
microarchitecture,A cross platform Redis Module Example that warns and uses the optimized functions based on instruction set extensions available and or microarchitecture
User: filipecosta90
microarchitecture,FISC - Flexible Instruction Set Computer - Is the new Instruction Set Architecture inspired by ARMv8 and x86-64
Organization: fisc-project
microarchitecture,A cross platform C99 library to get cpu features at runtime.
Organization: google
microarchitecture,A runahead execution CPU model in the gem5 simulator - feat. delayed exit experiments
User: halworsen
microarchitecture,x86-64-level - Get the x86-64 Microarchitecture Level on the Current Machine
User: henrikbengtsson
Home Page: https://github.com/HenrikBengtsson/x86-64-level
microarchitecture,an ARM9 compatible CPU core written in Verilog, and related experiments
User: jasha64
microarchitecture,FlexGripPlus: an open-source GPU model for reliability evaluation and micro architectural simulation
User: jerc007
microarchitecture,CPU micro benchmarks
User: jiegec
microarchitecture,High performance Bitcoin development platform
Organization: k-nuth
microarchitecture,This project was done as a part of RISC-V based MYTH (Microprocessor for you in Thirty Hours) workshop organized by Kunal Ghosh and Steve Hoover
User: kuby1412
microarchitecture,
User: leepoly
microarchitecture,Microarchitectural attack development frameworks for prototyping attacks in native code (C, C++, ASM) and in the browser
User: libtea
Home Page: https://www.usenix.org/conference/usenixsecurity22/presentation/easdon
microarchitecture,2021-22 Summer Project in Computer Science
User: lywangj
microarchitecture,Sequential entries of a long number with offset for the FPGA microarchitecture on system verilog
User: mamadaliev
microarchitecture, [2009 – 2012] MDSP: functional simulation of a Multimedia Digital Signal Processor
Organization: mipt-ilab
microarchitecture,Open-source high-performance RISC-V processor
Organization: openxiangshan
microarchitecture,An implementation of the LC-3 architecture in VHDL, as described in the book "Introduction to Computing Systems by P&P".
User: sacusa
microarchitecture,A pedagogical processor on FPGA, developed at NIIT University.
User: sacusa
microarchitecture,Presentation about software-based Micro-architectural Side-Channel attacks.
User: saruman9
microarchitecture,inVtero.net: A high speed (Gbps) Forensics, Memory integrity & assurance. Includes offensive & defensive memory capabilities. Find/Extract processes, hypervisors (including nested) in memory dumps using microarchitechture independent Virtual Machiene Introspection techniques
User: shanek2
Home Page: http://shanek2.github.io/inVtero.net
microarchitecture,How to exploit a double free vulnerability in 2021. Use After Free for Dummies
User: stong
microarchitecture,Fun with branch predictors
User: tommythorn
microarchitecture,.NET version of google/cpu_features to get cpu info at runtime.
User: toor1245
microarchitecture,Framework that integrates the serverless benchmark suite vSwarm with gem5, the state-of-the-art research platform for system-and microarchitecture.
Organization: vhive-serverless
Home Page: https://vhive-serverless.github.io/vSwarm-u/
microarchitecture,Kite: Architecture Simulator for RISC-V Instruction Set
Organization: yonseicasl
Home Page: https://casl.yonsei.ac.kr/kite
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