hsluoyz / atalanta Goto Github PK

I am curious about why it sends different results(iNoPatternsAfterCompact vs (int)(iNoPatternsAfterCompact / 9.4443)) to logfile and terminal. Is that for any calculation purpose? [location: atalanta.cpp: line742;752]

What is the significance of bench files in atalanta. Why only bench file is given as input in atalanta

I had followed all steps given in Installation Procedure, but then I am getting the following error

zakir@zakir-virtual-machine:~$ atalanta c17.bench
INPUT is not valid
Fatal error: Error in circuit file

How to give test vectors as input in ATLANTA.

when we have constant input in our circuits, how it represent in bench format?

While compiling the source code to make the executable, it is showing "io.o: In function Z9getMemoryv': C:\Users\PRIYAJIT\downloads\Atalanta-master/io.cpp:774: undefined reference to GetProcessMemoryInfo@12'
collect2.exe: error: ld returned 1 exit status
makefile:37: recipe for target 'atalanta' failed
mingw32-make: *** [atalanta] Error 1

Hello,

I am working as a Lecturer in engineering college here in India. My Institution's name is Muffakham Jah College of Engineering and Technology, Hyderabad, India. I did my Masters in VLSI system design.

Could you please guide me,

1. Are there any open-source tools for DFT Sequential-Circuits, as it is stated Atalanta is for combinational circuit testing?
2. Can I give my own test vectors to the Atalanta Tool?

Hopefully, you will help me in this regard.

In some combinational circuits buffer is added as one of the components in bench file. @hsluoyz Why do we need to add buffer , even if without adding the buffer we can still run the simulation??

when i use ./atalanta s9234.bench,this error would happened.
but it wouldn't happened when i use ./atalanta s5378.bench

I have this Question

Is it possible to test my own CUT(Component Under Test) of which netlist is obtained from yosys synthesis tool?