Setup for Sipeed Tang Primer 20K (GW2A-LV18PG256C8) about neorv32-setups HOT 5 OPEN

@stnolting :
I had to spend some time on different project. Finally, here is my example.
neorv32_tang_primer_20k_ddr_example

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Hey @mlapaj,

sounds good - I always wanted to play with those FPGAs.

Can I prepare such example setup for this ?

That would be really great!

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Wow, that looks great! Thanks for sharing!

I'm curious as I have never worked with these FPGAs (yet). Could you say something about resource utilization and clock speed?

How about creating a PR to link your setup on the repository's front page? 😉

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Thank you very much for your opinion.
With the latest commit I have added info abut clock, basically I used 27 MHZ - default clock frequency taken from crystal oscillator. Also you will find the resource utilization taken from the place and route phase. I understand that you are more interested in getting statistics with pure Neorv32 resource usage, without DDR/wishbone stuff. I`ll work on it (I will create a branch with pure CPU).

When I'll be ready (need to study current setups and "Adding Your Project or Setup" section), I`ll prepare PR to front page.

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With the latest commit I have added info abut clock, basically I used 27 MHZ - default clock frequency taken from crystal oscillator

Thanks for the update!

Also you will find the resource utilization taken from the place and route phase. I understand that you are more interested in getting statistics with pure Neorv32 resource usage, without DDR/wishbone stuff. I`ll work on it (I will create a branch with pure CPU).

Sure, that's interesting. But a real world setup including all the required peripherals to make the processor run is even more interesting.

However, could you also add some information about the CPU configuration (enabled extensions and options), the memory sizes and the enabled NEORV32 peripherals?

When I'll be ready (need to study current setups and "Adding Your Project or Setup" section), I`ll prepare PR to front page.

Great, thanks! 👍

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