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License: MIT License
Python library for parsing module definitions and instantiations from SystemVerilog files
License: MIT License
When multiple files are passed to get_defs
, provide an indication of which one has a syntax error, if any. The same file could be passed multiple times, so this should make clear which instance of that file is generating the error.
Example:
`define MOD_INST u_mysubmod
module mymod;
mysubmod `MOD_INST ();
endmodule
Output:
files:
- file_name: "some_file.sv"
defs:
- mod_name: "mymod"
insts:
Expected:
files:
- file_name: "some_file.sv"
defs:
- mod_name: "mymod"
insts:
- mod_name: "mysubmod"
inst_name: "u_mysubmod"
It seems that generate blocks are ignored in svinst/pysvinst. If you save the SV code as top.sv and the Python code as test.py, then python test.py
will prove the concept. There are 16 instances described in top.sv, but only one identified by pysvinst.
// top.sv
module top (
input logic i_clk,
output logic [15:0] o_clks
);
genvar i;
generate
for (i=0; i < 16; i++) begin : generate_test
my_module my_module_inst (
.i_clk(i_clk),
.o_clk(o_clks[i])
);
end : generate_test
endgenerate
endmodule
# test.py
defs = svinst.get_defs("top.sv")
print("len(defs):", len(defs))
print("len(defs[0].insts):", len(defs[0].insts))
print("defs[0].insts[0]:", defs[0].insts[0])
# result:
"""
len(defs): 1
len(defs[0].insts): 1
defs[0].insts[0]: ModInst("my_module", "my_module_inst")
"""
It might be a little tricky to add such functionality but I don't think it would necessitate a full elaboration of the design. All that would be needed is to keep track of elab-time constants (defines/parameters/localparams/literal constants/etc...) in order to interpret a generate block's behavior accordingly. The only two constructs that would steer a generate block that I can think of are if/else (something is either instantiated or it isn't) and for loops (something is instantiated N times).
I haven't looked at the Rust code in svinst
so I don't know how difficult it would be to add this functionality, but what's your guess? I'm no Rust aficionado but I'm happy to help if you reckon it ought to be within the scope of this project.
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