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Welcome to the ZipCPU-Blog!

The files in this repository host the ZipCPU blog articles via GitHub pages.

While you are welcome to browse these files via Github's interface, I personally think you'll find them much more interesting to look at from either the web-site's main page, the topics page which offers a categorical list of past posts and future posts, or the about page which will tell you more about Gisselquist Technology, the ZipCPU, and other projects/products that Gisselquist Technology provides.

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website's Issues

Beginners Tutorial: Verilator driver compilation failure

Hi Daniel,

In https://zipcpu.com/tutorial/lsn-01-wires.pdf on page 24, the g++ compilation step in example ex-01-thruwire fails for me with below link error:

$ make
Building a Verilator-based simulation of thruwire
g++ -I/usr/share/verilator/include  -I obj_dir     \
	/usr/share/verilator/include/verilated.cpp \
	thruwire.cpp obj_dir/Vthruwire__ALL.a      \
	-o thruwire
/usr/bin/ld: /tmp/ccZsNn1l.o: in function `VerilatedContext::threadPoolp()':
verilated.cpp:(.text+0xbd8e): undefined reference to `VlThreadPool::VlThreadPool(VerilatedContext*, unsigned int)'
collect2: error: ld returned 1 exit status
make: *** [Makefile:44: thruwire] Error 1

Do I miss any environment setting? The very same error happens when I try the make in example ex-01-maskbus. My system is a standard Debian 12 Linux, and comes with verilator version 5.006:

$ verilator -V
Verilator 5.006 2023-01-22 rev (Debian 5.006-3)

Copyright 2003-2023 by Wilson Snyder.  Verilator is free software; you can
redistribute it and/or modify the Verilator internals under the terms of
either the GNU Lesser General Public License Version 3 or the Perl Artistic
License Version 2.0.

See https://verilator.org for documentation

Summary of configuration:
  Compiled in defaults if not in environment:
    SYSTEMC            = 
    SYSTEMC_ARCH       = 
    SYSTEMC_INCLUDE    = 
    SYSTEMC_LIBDIR     = 
    VERILATOR_ROOT     = /usr/share/verilator
    SystemC system-wide = 1

Environment:
    MAKE               = 
    PERL               = 
    SYSTEMC            = 
    SYSTEMC_ARCH       = 
    SYSTEMC_INCLUDE    = 
    SYSTEMC_LIBDIR     = 
    VERILATOR_BIN      = 
    VERILATOR_ROOT     = 

Supported features (compiled-in or forced by environment):
    COROUTINES         = 1
    SYSTEMC            = 1

Outdated links to Github source files on AXI Tutorials

There are a few links on the blog that point out to, what I suppose, was a previous project organization. You can find them looking for:

https://github.com/ZipCPU/wb2axip/blob/master/*.v

Nowadays they are at:

https://github.com/ZipCPU/wb2axip/blob/master/rtl/*.v

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