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This project forked from yosyshq/yosys

Yosys Open SYnthesis Suite

License: ISC License

Shell 0.60% JavaScript 0.08% Ruby 0.01% C++ 50.32% Python 4.02% Perl 0.11% C 0.74% VHDL 0.01% Verilog 39.69% TeX 1.01% Pawn 0.03% SystemVerilog 1.35% OpenSCAD 0.02% Makefile 0.68% HTML 0.12% Yacc 0.98% Lex 0.19% SMT 0.04% Dockerfile 0.01% CMake 0.01%

yosys's Issues

Enable Lakeroad annotations of single operators/enable finer grain annotation

You can put Verilog annotations on finer-grained constructs than just modules. We could enable the Lakeroad pass to handle annotations on finer-grained things.

`simple-mux.ys` crashes due to infinite loop

./yosys backends/lakeroad/tests/simple-mux.ys

leads to

...
; { 1'0 \out [1:0] }
; { 1'0 \out [1:0] }
; { 1'0 \out [1:0] }
; { 1'0 \out [1:0] }
; { 1'0 \out [1:0] }
; { 1'0 \out [1:0] }
; { 1'0 \out [1:0] }
; { 1'0 \out [1:0] }
; { 1'0 \out [1:0] }
; { 1'0 \out [1:0] }
; { 1'0 \out [1:0] }
[1]    50807 segmentation fault  ./yosys backends/lakeroad/tests/simple-mux.ys

Working on this now. CC @thiskappaisgrey.

Get Lakeroad+Yosys integration merged into Yosys

Tasks:

Move all of the Lakeroad-related stuff onto its own branch
Make Lakeroad stuff build optionally; connect it to an external Lakeroad with the Yosys plugin system
Clean up Lakeroad and document it so that it can be externally used
Open PR on Yosys

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