Modifying CFG space about pcileech-fpga HOT 5 CLOSED

I know people have been modifying the .xci file directly that generates the PCIe core. Also the generated core sources.

But I have not looked into this myself so I can't really help more than this in this matter.

from pcileech-fpga.

Would you happen to know the exact name of the .xci file that generates the PCIe core?

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https://github.com/ufrisk/pcileech-fpga/blob/master/PCIeSquirrel/ip/pcie_7x_0.xci

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After looking at the documentation on xilinx, it seems like that the MSI Control is stored at the 40 range, does this also seem like I'm looking in the right direction too you? Thanks in advance!

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Yeah, looks ok to me. This is a long and tedious process though, but best wishes with it 👍

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