Topic: intel-fpga Goto Github
Some thing interesting about intel-fpga
Some thing interesting about intel-fpga
intel-fpga,OpenCL wrapper for Intel's unique chip ID function built for the Cyclone V chip on the DE1-SoC board
Organization: abr
intel-fpga,Play and learn with the Terasic DE0-Atlas/Nano-SoC Kit featuring a Altera/Intel Cyclone V 5CSEMA4U23C6N FPGA with integrated dual-core ARM Cortex-A9.
User: andrsmllr
intel-fpga,High-Level Synthesis with Partial Evaluation
Organization: anydsl
intel-fpga,A Comprehensive Dataflow Compiler for High-Level Synthesis
Organization: anydsl
intel-fpga,Serving object detection models on different hardware.
User: canhld94
intel-fpga,A collection of extensions for Vitis and Intel FPGA OpenCL to improve developer quality of life.
User: definelicht
intel-fpga,Verilog programs in gate level, dataflow & behavioural modelling with testbenches written in intel FPGA tested with ModelSim simulator
User: dhwanish-3
intel-fpga,Load vs Store comparison on Intel FPGA using oneAPI
User: fm16191
intel-fpga,SoC and Embedded Linux
Organization: insper
Home Page: https://insper.github.io/Embarcados-Avancados/
intel-fpga,IntelFPGA configuration & Avalon-MM access library for FlashAir
User: osafune
intel-fpga,Demonstration how to build a Management Web interface to interact with the FPGA fabric and change the FPGA configuration with the Django Framework
User: robseb
intel-fpga, SoCFPGA: Mapping HPS Peripherals, like IĀ²C or CAN, over the FPGA fabric to FPGA I/O and using embedded Linux to control them (Intel Cyclone V)
User: robseb
intel-fpga,Yocto Project BSP meta-layer for Intel (ALTERA) SoC-FPGAs (SoCFPGA) - with step by step guide
User: robseb
Home Page: https://layers.openembedded.org/layerindex/branch/master/layer/meta-intelfpga/
intel-fpga,Automatically create a NIOS II Eclipse Project with the latest FreeRTOS Version, the Intel hwlib and more...
User: robseb
intel-fpga,Source Code of Yocto Layer for accessing FPGA Manager of the Intel (ALTERA) Arria 10 SX SoCFPGA
User: robseb
intel-fpga,Source Code of Yocto Layer for accessing FPGA Manager of the Intel (ALTERA) Cyclone V SoCFPGA
User: robseb
intel-fpga,š¤ SoCFPGA: Open-Source Embedded Linux Distribution with a highly flexible build system, developed for Intel (ALTERA) SoC-FPGAs (Cyclone V & Arria 10)
User: robseb
Home Page: https://rsyocto.com/
intel-fpga,Script to build the bootloader (u-boot) and bring all components to a bootable image for Intel (ALTERA) SoC-FPGAs
User: robseb
intel-fpga,Examples shown as part of the tutorial "Productive parallel programming on FPGA with high-level synthesis".
Organization: spcl
intel-fpga,Fletcher Open Programmable Acceleration Engine platform support
Organization: teratide
Home Page: https://teratide.github.io/fletcher-opae
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