To practice FPGA digital design using VHDL, I used the laboratory exercises provided by intel FPGAcademy for the Digital Logic course. Terasic DE0-CV Board (Altera Cyclone V FPGA device) was used during the labs. The labs involved the following topics:

• Switches, LEDS, and Multiplexers
• Numbers and Displays
• Latches, Flip-flops and Registers
• Counters
• Timers and Real-Time Clocks
• Adders, Subtracters, and Multipliers
• Finite State Machines
• Memory Blocks

In each lab directory, there will be the following:

• the lab requirements (pdf file)
• RTL files (.vhd), testbench file (_tb.vhd), and Intel Quartus Prime files (.qsf, .qpf, and .sdc) for each part of the lab

These labs have been done as part of my internship at PyramidTech during Summer 2022.