Symbol generation from Verilog-A model about qucs_s HOT 4 CLOSED

It seems you forgot to edit and save the device symbol. After pressing F9 on the Verilog-A source the symbol editor opens. I have seen only square symbol in your project. After I edited and saved the *.sym file everything works as expected.

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I made F9 and the ekv26.sym was opened but as a box. I mirrored few things and made save.
But from where I should get the transistor symbol as you shown in your last picture? You really paint it with the primitives paintings on left side? Can't believe. Is there a documentation?
Sorry for my very basic question.

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Yes, you must draw the symbol from primitives. Automatic symbol generation is not possible. But we provide symbol templates with the application. Open the share/qucs-s/examples/symbols/schematic_symbols.sch document and copy-paste the symbol.

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Yes - now I got it.
Thanks,
I will close

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