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View Code? Open in Web Editor NEWScript to generate a SSDT for Power Management
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I7 3930K SSDT
Hello Pike
I have a problem in creating the SSDT table for the CPU 3930K. I have this error
System information: Mac OS X 10.9.2 (13C64)
Brandstring 'Intel(R) Core(TM) i7-3930K CPU @ 3.20GHz'
Scope (SB) {19318 bytes} with ACPI Processor declarations found in the DSDT (ACPI 1.0 compliant)
Generating ssdt.dsl for a 'MacPro4,1' with board-id [Mac-F4238CC8]
Sandy Bridge Core i7-3930K processor [0x206D7] setup [0x0a01]
With a maximum TDP of 130 Watt, as specified by Intel
Number logical CPU's: 12 (Core Frequency: 3200 MHz)
Number of Turbo States: 6 (3300-3800 MHz)
Number of P-States: 27 (1200-3800 MHz)
Injected C-States for C000 (C1,C3,C6,C7)
Warning: 'cpu-type' may be set improperly (0x0a01 instead of 0x0601)
Error: board-id [Mac-F4238CC8] not supported by Sandy Bridge – check SMBIOS data / use the -c option
Do you want to continue (y/n)? n
Mac-Pro-di-Gabriele:~ gabriele$ -c
-bash: -c: command not found
Mac-Pro-di-Gabriele:~ gabriele$
Advice
Thanks
Only four speedsters with i3-3110M on Yosemite and Mavericks
Hello Pike,
Please, advice me how to get more P-States.. I did these steps:
On Yosemite (Mavericks same) Clover with -XCPM boot flag, and DropOEM SSDT True and with SMBIOS Macbookpro9,2 (Macbookpro11,1 same thing) and with ./ssdtPRGen.sh -w 3 -x 1 (./ssdtPRGen.sh -w 0 -x 1 or ./ssdtPRGen.sh -w 1 -x 1 or ./ssdtPRGen.sh -w 2 -x 1) i get:
6/22/14, 4:08:25 PM, Current State: 24
6/22/14, 4:08:25 PM, P States: 12, 18, 21, 24
6/22/14, 4:08:17 PM, Current State: 12
6/22/14, 4:08:17 PM, P States: 12, 18, 21, 24
Thanks in advance!
Core I7 4390K SSDT
Hi, im not familiar with terminal commands how ever the SSDT generated and renamed it to ssdt.sh (is that correct?) can you help me to modify the file correctly? can you type for me which command i need to run in terminal?\Thanks
ssdtPRGen v 11.5, some small glitches with parameters
Hi Pike, not something to whine about, just report some small glitches to remind you when working on next version.
[1]----------------------------------------------------------------------------------------------------------------------
[command]
sudo ./ssdtPRGen-v11.5.sh -help
-cpu type [0/1/2/3] > options displayed wrong (out order)
[1] = Sandy Bridge > {0}
[2] = Ivy Bridge > {1}
[3] = Haswell > {2}
[4] = Broadwell > {3}
[Execute Results]
-c [x]
0 = Sandy Bridge > Override value: (-c) CPU type, now using: Sandy Bridge!
1 = Ivy Bridge > Override value: (-c) CPU type, now using: Ivy Bridge!
2 = Haswell > Override value: (-c) CPU type, now using: Hasswell!
3 = Broadwell > Override value: (-c) CPU type, now using: Broadwell!
4 = Error: 'BridgeType' must be 0, 1, 2 or 3 ...Aborting ...
[2]----------------------------------------------------------------------------------------------------------------------
[command]
sudo ./ssdtPRGen-v11.5.sh -c {0} -m MacPro6,1 -b Mac-F60DEB81FF30ACF6
[result]
[NOK]
Error! model (MacPro6,1) doesn't match with [Mac-F60DEB81FF30ACF6] – check SMBIOS data
--> (test with proper SMBIOS data)
[command]
sudo ./ssdtPRGen-v11.5.sh -c {1} -m MacPro6,1 -b Mac-F60DEB81FF30ACF6
[result]
[OK]
[command]
sudo ./ssdtPRGen-v11.5.sh
--> no param (default Sandy Bridge Core i7-3930K)
Generating ssdt.dsl for a 'MacPro6,1' with board-id [Mac-F60DEB81FF30ACF6]
Sandy Bridge Core i7-3930K processor [0x206D7] setup [0x0a01]
With a maximum TDP of 130 Watt, as specified by Intel
Number logical CPU's: 12 (Core Frequency: 3200 MHz)
Number of Turbo States: 6 (3300-3800 MHz)
Number of P-States: 27 (1200-3800 MHz)
Injected C-States for C000 (C1,C3,C6,C7)
[result]
[NOK]
Error: model (MacPro6,1) doesn't match with [Mac-F60DEB81FF30ACF6] – check SMBIOS data
--> (test with proper SMBIOS data)
Speedstep of Core i3 3120M on Yosemite
Hi Pike,
I'm using Ivy Bridge Core i3 3120M (2.5 Ghz) and Yosemite DP1. It got 4 steps on Mavericks and ML (12, 17, 21 and 25). However, it got only 2 steps on Yosemite (12 and 25). I tried to fix it by many ways but nothing change. Please help me fix that issue. This is my system:
Clover: r2699
SSDT.aml: 13.5 (last version of you)
AppleHPET: Loaded
AppleLPC: Loaded
AICPM: Patched by Clover (I don't use NullAICPM)
SMBIOS: MacbookAir 5,2
Thanks in advance :)
Warning: No ACPI Processor declarations found in the DSDT!
Hey Pike,
version 12.7 shows me:
ssdtPRGen.sh v0.9 Copyright (c) 2011-2012 by † RevoGirl
v6.6 Copyright (c) 2013 by † Jeroen
v12.7 Copyright (c) 2013-2014 by Pike R. Alpha
Bugs > https://github.com/Piker-Alpha/ssdtPRGen.sh/issues <
System information: Mac OS X 10.9.3 (13D17)
Brandstring 'Intel(R) Xeon(R) CPU E5-2690 v2 @ 3.00GHz'
ACPI Processor {.} Declaration(s) found in DSDT
Warning: No ACPI Processor declarations found in the DSDT!
Using assumed Scope (_SB) {}
Generating ssdt.dsl for a 'MacPro6,1' with board-id [Mac-F60DEB81FF30ACF6]
Ivy Bridge Core E5-2690 v2 processor [0x306E4] setup [0x0a01]
With a maximum TDP of 130 Watt, as specified by Intel
Number logical CPU's: 20 (Core Frequency: 3000 MHz)
Number of Turbo States: 6 (3100-3600 MHz)
Number of P-States: 25 (1200-3600 MHz)
Injected C-States for C000 (C1,C3,C6)
Injected C-States for C001 (C1,C3,C6)
Warning: 'system-type' may be set improperly (1 instead of 3)
Is the ACPI declaration warning an severe issue or is it just cosmetic?
regards,
mark
Speedstep Issue
Hi, first thanks for the script, i have an issue, i setted macmini 6,2 in smbios and next i edited ssdt with your script but i have only 4 states and 3 turbo states; my cpu is a 3770 not K, MoBo Z77X-UP5 TH, any solution?
Thanks.
Haswell i5-4300U
Please add Haswell i5-4300U to your script. Thank you!
Old Cpu Request...
Hi pike, i have an Laptop with i7-4558U and here your script works very good!
But i have an old PC and Clover/Chameleon too, fails to generate the right tables...
I get with chameleon for example a 4,7 - 40GHz CPU...
Its a E5400 on a LGA775 Socket
http://ark.intel.com/products/40478/Intel-Pentium-Processor-E5400-2M-Cache-2_70-ghz-800-mhz-fsb
It would be awesome to have just an option to generate ssdt for this old cpus...
(It's working as MacPro3,1 on 10.9.2 very good)
Cheers :-)
Clarksfield (i7-720QM & i7-740QM) Support
Piker,
I runned the new script without any flag and this is what the script returns
ssdtPRGen.sh v0.9 Copyright (c) 2011-2012 by † RevoGirl
v6.6 Copyright (c) 2013 by † Jeroen
v13.0 Copyright (c) 2013-2014 by Pike R. Alpha
Bugs > https://github.com/Piker-Alpha/ssdtPRGen.sh/issues <
System information: Mac OS X 10.9.2 (13C64)
Brandstring 'Intel(R) Core(TM) i7 CPU Q 720 @ 1.60GHz'
Warning: The brandstring has an unexpected length!
Error: Unknown processor model ...
Aborting ...
Done
i also tried
ssdtPRGen.sh -a CPU -b Mac-189A3D4F975D5FFC -c 0 -d 3 -f 1730 -l 8 -p 'Intel Core i7 Q720' -turbo 2930 -t 45
ssdtPRGen.sh v0.9 Copyright (c) 2011-2012 by † RevoGirl
v6.6 Copyright (c) 2013 by † Jeroen
v13.0 Copyright (c) 2013-2014 by Pike R. Alpha
Bugs > https://github.com/Piker-Alpha/ssdtPRGen.sh/issues <
Override value: (-a) label for ACPI Processors, now using 'CPU'!
Override value: (-b) board-id, now using: Mac-189A3D4F975D5FFC!
Override value: (-c) CPU type, now using: Sandy Bridge!
Override value: (-d) debug mode, now using: 3!
Override value: (-f) clock frequency, now using: 1730 MHz!
Override value: (-l) number of logical processors, now using: 8!
Override value: (-turbo) maximum (turbo) frequency, now using: 2930 MHz!
Override value: (-t) maximum TDP, now using: 45 Watt!
System information: Mac OS X 10.9.2 (13C64)
Brandstring 'Intel(R) Core(TM) i7 CPU Q 720 @ 1.60GHz'
Warning: The brandstring has an unexpected length!
Error: Unknown processor model ...
Aborting ...
Done
Support for Xeon E5-2650 v1 (SandyBridge) in ssdtPRGen.
Hello Pike,
I've been running the script using SMBIOS Mac Pro 6,1 provided by Rampagedev.
My CPU doesn't seem to be supported properly by the script, it keeps on assimilating it with the Ivy Bridge version of the CPU, but clock speeds, TDP, etc. aren't the same. I also don't know exactly if the script generates the SSDT the same way for Sandy or Ivy CPUs, which means my states behave somewhat curiously sometimes.
I've edited the script adding the CPU settings under the Sandy tab, adding the Mac Pro 6,1 profile for Sandy CPUs, but it keeps on redirecting me to Ivy.
Could you please share some light on this ? or on how to edit the script properly ?
Here are the proper settings for my CPUs : E5-2650,95,1200,2000,2800,8,16
Thank you,
A.
i3-4350 support
It does not appear the the i3-4350 is supported by the current version of the script (v13.6 as of today). I know I might have jumped the gun a little on this purchase. Thank you for all your great work.
iasl will not download
In the newest version of ssdtPRGen.sh, iasl is not found and does not download. ssdt.aml will not generate. I downloaded RevBoot and copied iasl to /usr/local/bin/ with the terminal and then ran ssdtPRGen. ssdt.aml compiled without issue.
Rampage IV Extreme BIOS version 4804
Mac OS boots on a Samsung 840 Evo 250GB SSD using Clover bootloader
32 GB 1600MHz DDR3 running at 1333 MHz
4930k @3.4 GHz
GTX 770 4GB
ran with flags -c 1 -w 3 -turbo 4200
No Speedsteps with V13.14 on ASUS UX31A
Hi Pike,
My system is ASUS UX31A Zenbook Prime
With Intel Core i7-3517U
OS X 10.9.2 Mavericks
Because I massed up with lot of different patches and "tweaks", etc. my system was really down so I had to make new clean installation of my Mavericks so I wanted to try your new ssdtPRGen.sh V13.14 to generate fresh SSDT for my new system, but... it doesn't work for me. I'm getting no Speedsteps, CPU is stacked at 792MHz with multiplier at x8.0 and never change.
So I have to use older SSDT I made before with ssdtPRGen.sh from philippetev's HP ProBook Installer. I wanted to send U my SSDT.aml files, if U can take a look what's wrong, but can not attach that file type to this post.
Are there any flags necessary with your new version? Cause as I remember I ran the old one just simply without any flags or arguments.
Thanx and have good day...
Manolis
Scope (PR) {162 bytes} without Processor declarations … on Mountain Lion
How can i resolve this message:
System information: Mac OS X 10.8.5 (12F45)
Brandstring 'Intel(R) Core(TM) i5-2500 CPU @ 3.30GHz'
Scope (PR) {162 bytes} without Processor declarations ...
Scope (_PR) {164 bytes} without Processor declarations ...
Scope (SB) {108 bytes} without Processor declarations ...
Scope (SB) {86 bytes} without Processor declarations ...
Scope (_SB) {110 bytes} without Processor declarations ...
Scope (_SB) {88 bytes} without Processor declarations ...
Scope (SB) {24 bytes} without Processor declarations ...
Scope (SB) {108 bytes} without Processor declarations ...
Scope (SB) {152 bytes} without Processor declarations ...
Scope (SB) {12 bytes} without Processor declarations ...
Scope (SB) {134 bytes} without Processor declarations ...
Scope (SB) {134 bytes} without Processor declarations ...
Scope (SB) {76 bytes} without Processor declarations ...
Scope (_SB) {26 bytes} without Processor declarations ...
Scope (_SB) {110 bytes} without Processor declarations ...
Scope (_SB) {154 bytes} without Processor declarations ...
Scope (_SB) {14 bytes} without Processor declarations ...
Scope (_SB) {136 bytes} without Processor declarations ...
Scope (_SB) {136 bytes} without Processor declarations ...
Scope (_SB) {78 bytes} without Processor declarations ...
Generating SSDT.dsl for a iMac12,1 [Mac-942B5BF58194151B]
Sandy Bridge Core i5-2500 processor [0x206A7] setup [0x0603]
With a maximum TDP of 95 Watt, as specified by Intel
Number logical CPU's: 4 (Core Frequency: 3300 MHz)
Number of Turbo States: 4 (3400-3700 MHz)
Number of P-States: 22 (1600-3700 MHz)
Injected C-States for P000 (C1,C3,C6)
Intel ACPI Component Architecture
ASL Optimizing Compiler version 20110514 [May 14 2011]
Copyright (C) 2000 - 2009 Intel Corporation
Supports ACPI Specification Revision 4.0a
ASL Input: ./SSDT.dsl - 166 lines, 5977 bytes, 33 keywords
AML Output: ./SSDT.aml - 1278 bytes, 11 named objects, 22 executable opcodes
Compilation complete. 0 Errors, 0 Warnings, 0 Remarks, 0 Optimizations
Core Duo 2.4 Unknown CPU
I am trying to create ssdt with latest version of script and this is the error message I get
System information: Mac OS X 10.9.2 (13C64)
Brandstring 'Intel(R) Core(TM)2 Duo CPU P8600 @ 2.40GHz'
Error: Unknown processor model ...
Aborting ...
Only 2 low-power P-states and Intel CPPC support?
Hi Pike, thanks for your script, it seriously makes life easy when trying to get power management in OS X now. However, there's one slight catch. I don't get enough low-power P-states. I own a Clevo W230SS notebook with an i7-4710MQ CPU that's rated at 47W TDP, 2.5GHz max non-Turbo clock and 3.5GHz max Turbo clock. In Windows, when idling, I can see the CPU jump from 800MHz to about 1.3GHz in steps of 100MHz, when monitored from Intel XTU. However, on OS X, these are the P-states I get: 8, 17, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34 and 35. Is there any way I can add more low-power P-states to bridge the huge gaps between 8, 17 and 25? Every time I do something that only slightly taxes the CPU, it jumps up all the way to 1.7 or 2.5 GHz, which wastes power. I get nearly six hours of battery life in Windows, while I only can manage about four in OS X.
Secondly, I have an option in my BIOS that enables Intel Collaborative Processor Performance Control (CPPC). Is there any support for this in OS X, either natively, or through some sort of SSDT table editing? This is because I have an SSDT table that titles 'CppcTabl', after dumping tables in Linux.
ProBook issue with vanilla DSDT
PIke, I have no idea if you have fixed it, but there is an issue. Running the script on our ProBooks with vanilla DSDT causes generation of dsl code that cannot be compiled. AFAIK, there is no problem when the DSDT is patched with the ProBook-related patches by RehabMan. You can check here for more details about the issue: http://www.tonymacx86.com/hp-probook-mavericks/87816-hp-probook-installer-6-1-4x30s-4x40s-support-182.html#post772393
Update: even with RehabMan's workaround, the generated SSDT files are not usable. With them, the CPU stucks at x8.
Warning
Hi pike have this warning why ..please can you explain me
Warning: No Processor declarations found in the DSDT!
Using assumed Scope (_SB) {}
Generating ssdt.dsl for a 'MacPro6,1' with board-id [Mac-F60DEB81FF30ACF6]
Sandy Bridge Core i7-3930K processor [0x206D7] setup [0x0501]
With a maximum TDP of 130 Watt, as specified by Intel
Number logical CPU's: 12 (Core Frequency: 3200 MHz)
Number of Turbo States: 6 (3300-3800 MHz)
Number of P-States: 27 (1200-3800 MHz)
Injected C-States for P000 (C1,C3,C6,C7)
Warning: 'cpu-type' may be set improperly (0x0501 instead of 0x0a01)
Warning: 'system-type' may be set improperly (1 instead of 2)
request support for Sandy Bridge G860
Hello Pike,
Please could you add the support for the above mentioned CPU ?
ID is : 0X206A7 (TDP : 65W / minimum multiplier : x16 / turbo : x30
If needed, i could procure more informations.
Sincerely.
Here is the terminal log :
ssdtPRGen.sh v0.9 Copyright (c) 2011-2012 by † RevoGirl
v6.6 Copyright (c) 2013 by † Jeroen
v13.5 Copyright (c) 2013-2014 by Pike R. Alpha
Bugs > https://github.com/Piker-Alpha/ssdtPRGen.sh/issues <
System information: Mac OS X 10.6.8 (10K549)
Brandstring 'Intel(R) Pentium(R) CPU G860 @ 3.00GHz'
Error: Unknown processor model ...
Aborting ...
Done
Wrong MacPro6,1 no P-State on i7 3770k
Where is wrong?my P-State 8
/*
-
Intel ACPI Component Architecture
-
AML Disassembler version 20100331
* -
Disassembly of iASLpkI20d.aml, Wed May 7 18:17:56 2014
*
* -
Original Table Header:
-
Signature "SSDT" -
Length 0x000007CA (1994) -
Revision 0x01 -
Checksum 0x0B -
OEM ID "APPLE " -
OEM Table ID "CpuPm" -
OEM Revision 0x00013400 (78848) -
Compiler ID "INTL" -
Compiler Version 0x20130117 (538116375)*/
DefinitionBlock ("iASLpkI20d.aml", "SSDT", 1, "APPLE ", "CpuPm", 0x00013400)
{
External (PR.CPU7, DeviceObj)
External (PR.CPU6, DeviceObj)
External (PR.CPU5, DeviceObj)
External (PR.CPU4, DeviceObj)
External (PR.CPU3, DeviceObj)
External (PR.CPU2, DeviceObj)
External (PR.CPU1, DeviceObj)
External (PR.CPU0, DeviceObj)Scope (_PR.CPU0)
{
Method (_INI, 0, NotSerialized)
{
Store ("ssdtPRGen version....: 13.4 / Mac OS X 10.9.2 (13C64)", Debug)
Store ("target processor.....: i7-3770K", Debug)
Store ("running processor....: Intel(R) Core(TM) i7-3770K CPU @ 3.50GHz", Debug)
Store ("baseFrequency........: 1600", Debug)
Store ("frequency............: 3500", Debug)
Store ("busFrequency.........: 100", Debug)
Store ("logicalCPUs..........: 8", Debug)
Store ("maximum TDP..........: 77", Debug)
Store ("packageLength........: 24", Debug)
Store ("turboStates..........: 4", Debug)
Store ("maxTurboFrequency....: 3900", Debug)
Store ("machdep.xcpm.mode....: 0", Debug)
}Name (APLF, Zero) Name (APSN, 0x04) Name (APSS, Package (0x18) { Package (0x06) { 0x0F3C, 0x00012CC8, 0x0A, 0x0A, 0x2700, 0x2700 }, Package (0x06) { 0x0ED8, 0x00012CC8, 0x0A, 0x0A, 0x2600, 0x2600 }, Package (0x06) { 0x0E74, 0x00012CC8, 0x0A, 0x0A, 0x2500, 0x2500 }, Package (0x06) { 0x0E10, 0x00012CC8, 0x0A, 0x0A, 0x2400, 0x2400 }, Package (0x06) { 0x0DAC, 0x00012CC8, 0x0A, 0x0A, 0x2300, 0x2300 }, Package (0x06) { 0x0D48, 0x000120E0, 0x0A, 0x0A, 0x2200, 0x2200 }, Package (0x06) { 0x0CE4, 0x0001152F, 0x0A, 0x0A, 0x2100, 0x2100 }, Package (0x06) { 0x0C80, 0x000109B4, 0x0A, 0x0A, 0x2000, 0x2000 }, Package (0x06) { 0x0C1C, 0xFE6F, 0x0A, 0x0A, 0x1F00, 0x1F00 }, Package (0x06) { 0x0BB8, 0xF35F, 0x0A, 0x0A, 0x1E00, 0x1E00 }, Package (0x06) { 0x0B54, 0xE884, 0x0A, 0x0A, 0x1D00, 0x1D00 }, Package (0x06) { 0x0AF0, 0xDDDD, 0x0A, 0x0A, 0x1C00, 0x1C00 }, Package (0x06) { 0x0A8C, 0xD36A, 0x0A, 0x0A, 0x1B00, 0x1B00 }, Package (0x06) { 0x0A28, 0xC92B, 0x0A, 0x0A, 0x1A00, 0x1A00 }, Package (0x06) { 0x09C4, 0xBF1F, 0x0A, 0x0A, 0x1900, 0x1900 }, Package (0x06) { 0x0960, 0xB546, 0x0A, 0x0A, 0x1800, 0x1800 }, Package (0x06) { 0x08FC, 0xAB9F, 0x0A, 0x0A, 0x1700, 0x1700 }, Package (0x06) { 0x0898, 0xA229, 0x0A, 0x0A, 0x1600, 0x1600 }, Package (0x06) { 0x0834, 0x98E6, 0x0A, 0x0A, 0x1500, 0x1500 }, Package (0x06) { 0x07D0, 0x8FD3, 0x0A, 0x0A, 0x1400, 0x1400 }, Package (0x06) { 0x076C, 0x86F1, 0x0A, 0x0A, 0x1300, 0x1300 }, Package (0x06) { 0x0708, 0x7E3F, 0x0A, 0x0A, 0x1200, 0x1200 }, Package (0x06) { 0x06A4, 0x75BD, 0x0A, 0x0A, 0x1100, 0x1100 }, Package (0x06) { 0x0640, 0x6D6A, 0x0A, 0x0A, 0x1000, 0x1000 } }) Method (ACST, 0, NotSerialized) { Store ("Method CPU0.ACST Called", Debug) Store ("CPU0 C-States : 13", Debug) Return (Package (0x05) { One, 0x03, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000000, // Address 0x01, // Access Size ) }, One, Zero, 0x03E8 }, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000010, // Address 0x03, // Access Size ) }, 0x03, 0xCD, 0x01F4 }, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000020, // Address 0x03, // Access Size ) }, 0x06, 0xF5, 0x015E } }) } Method (_DSM, 4, NotSerialized) { Store ("Method CPU0._DSM Called", Debug) If (LEqual (Arg2, Zero)) { Return (Buffer (One) { 0x03 }) } Return (Package (0x02) { "plugin-type", One }) }}
Scope (_PR.CPU1)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method PR.CPU1.APSS Called", Debug)
Return (_PR.CPU0.APSS)
}Method (ACST, 0, NotSerialized) { Store ("Method CPU1.ACST Called", Debug) Store ("CPU1 C-States : 13", Debug) Return (Package (0x05) { One, 0x03, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000000, // Address 0x01, // Access Size ) }, One, 0x03E8, 0x03E8 }, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000020, // Address 0x03, // Access Size ) }, 0x03, 0xC6, 0xC8 }, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000030, // Address 0x03, // Access Size ) }, 0x06, 0xF5, 0x015E } }) }}
Scope (_PR.CPU2)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method PR.CPU2.APSS Called", Debug)
Return (_PR.CPU0.APSS)
}Method (ACST, 0, NotSerialized) { Return (\_PR.CPU1.ACST ()) }}
Scope (_PR.CPU3)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method PR.CPU3.APSS Called", Debug)
Return (_PR.CPU0.APSS)
}Method (ACST, 0, NotSerialized) { Return (\_PR.CPU1.ACST ()) }}
Scope (_PR.CPU4)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method PR.CPU4.APSS Called", Debug)
Return (_PR.CPU0.APSS)
}Method (ACST, 0, NotSerialized) { Return (\_PR.CPU1.ACST ()) }}
Scope (_PR.CPU5)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method PR.CPU5.APSS Called", Debug)
Return (_PR.CPU0.APSS)
}Method (ACST, 0, NotSerialized) { Return (\_PR.CPU1.ACST ()) }}
Scope (_PR.CPU6)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method PR.CPU6.APSS Called", Debug)
Return (_PR.CPU0.APSS)
}Method (ACST, 0, NotSerialized) { Return (\_PR.CPU1.ACST ()) }}
Scope (_PR.CPU7)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method PR.CPU7.APSS Called", Debug)
Return (_PR.CPU0.APSS)
}Method (ACST, 0, NotSerialized) { Return (\_PR.CPU1.ACST ()) }}
}
And my ssdtPRGen.sh
ssdtPRGen.sh v0.9 Copyright (c) 2011-2012 by † RevoGirl
v6.6 Copyright (c) 2013 by † Jeroen
v13.4 Copyright (c) 2013-2014 by Pike R. Alpha
Bugs > https://github.com/Piker-Alpha/ssdtPRGen.sh/issues <
Override value: (-turbo) maximum (turbo) frequency, now using: 3900 MHz!
Override value: (-t) maximum TDP, now using: 77 Watt!
System information: Mac OS X 10.9.2 (13C64)
Brandstring 'Intel(R) Core(TM) i7-3770K CPU @ 3.50GHz'
Scope (PR) {220 bytes} with ACPI Processor declarations found in the DSDT (ACPI 1.0 compliant)
Generating ssdt.dsl for a 'MacPro6,1' with board-id [Mac-F60DEB81FF30ACF6]
Ivy Bridge Core i7-3770K processor [0x306A9] setup [0x0704]
With a maximum TDP of '77' Watt, as specified by argument: -t 77
Number logical CPU's: 8 (Core Frequency: 3500 MHz)
Number of Turbo States: 4 (3600-3900 MHz)
Number of P-States: 24 (1600-3900 MHz)
Injected C-States for CPU0 (C1,C3,C6)
Injected C-States for CPU1 (C1,C3,C6)
Warning: 'cpu-type' may be set improperly (0x0704 instead of 0x0a04)
Warning: 'system-type' may be set improperly (1 instead of 3)
Intel ACPI Component Architecture
ASL Optimizing Compiler version 20130117-64 [Jan 19 2013]
Copyright (c) 2000 - 2013 Intel Corporation
ASL Input: /Users/icrusher/Desktop/ssdt.dsl - 303 lines, 8861 bytes, 71 keywords
AML Output: /Users/icrusher/Desktop/ssdt.aml - 1994 bytes, 28 named objects, 43 executable opcodes
Compilation complete. 0 Errors, 0 Warnings, 0 Remarks, 0 Optimizations
Do you want to copy /Users/icrusher/Desktop/ssdt.aml to /Extra/ssdt.aml? (y/n)?
i5-3470 Z77 | iMac 13,2 SMBIOS | Ups?
Version 13.5
Sumthin goes wrong. CPU stuck on multiplier 8x. SSDT generated by Version 6.8 works properly.
Asus Z77M Pro - Patched | i5-3470 | Correct SMBIOS iMac13,2 10.9.3
Hyperthreading
Hi Pike,
11.6 gives some weird warnings running on a CPU with HT:
System information: Mac OS X 10.9.2 (13C62)
Brandstring 'Intel(R) Core(TM) i7-4771 CPU @ 3.50GHz'
Warning: only 8 of 4 processor declarations found!
Warning: only 8 of 4 processor declarations found!
Two SB E5-2687W not using P-States
Hey here again
ssdtPRGGen.sh log:
Override value: (-x) XCPM mode, now set to: 1!
Override value: (-c) CPU type, now using: Ivy Bridge!
System information: Mac OS X 10.9.3 (13D65)
Brandstring 'Intel(R) Xeon(R) CPU E5-2687W 0 @ 3.10GHz'
Generating ssdt.dsl for a 'Hackintosh Z9PE-D8 WS' with board-id [Mac-F60DEB81FF30ACF6]
Ivy Bridge Core E5-2687W v2 processor [0x206D7] setup [0x0501]
With a maximum TDP of 150 Watt, as specified by Intel
Number logical CPU's: 32 (Core Frequency: 3400 MHz)
Number of Turbo States: 6 (3500-4000 MHz)
Number of P-States: 29 (1200-4000 MHz)
Injected C-States for C000 (C1,C3,C6)
Injected C-States for C001 (C1,C3,C6)
Warning: 'cpu-type' may be set improperly (0x0501 instead of 0x0701)
Warning: board-id [Mac-F60DEB81FF30ACF6] and model [Hackintosh
Do you want to continue (y/n)? y
Intel ACPI Component Architecture
ASL Optimizing Compiler version 20130117-64 [Jan 19 2013]
Copyright (c) 2000 - 2013 Intel Corporation
ASL Input: /Users/niklasoestergaard/Desktop/ssdt.dsl - 768 lines, 22833 bytes, 220 keywords
AML Output: /Users/niklasoestergaard/Desktop/ssdt.aml - 5774 bytes, 102 named objects, 118 executable opcodes
Compilation complete. 0 Errors, 0 Warnings, 0 Remarks, 0 Optimizations
Do you want to copy /Users/niklasoestergaard/Desktop/ssdt.aml to /Extra/ssdt.aml? (y/n)? n
Do you want to open ssdt.dsl (y/n)? n
Where do I get the AppleIntelCPUPowerManagementInfo.kext log?
XCPM: P-state table mismatch (error:0x15)
Hi, i've read all articles about this type of error, first i had 0x12, then 0x1b, 0x11 and now with -x 1 -w 0 i have 0x15; My cpu is a 3770 and mobo a z77x up5 th with edited dsdt; i've also tried to disable turbo, cpu pll, eist and c6 support in uefi bios but result is the same. Smbioses i've tried are macmini6,2 and imac 13,2 (same cpu). This is my SSDT (removed / only need the Debug data)
Store ("ssdtPRGen version....: 13.5 / Mac OS X 10.9.3 (13D65)", Debug)
Store ("target processor.....: i7-3770", Debug)
Store ("running processor....: Intel(R) Core(TM) i7-3770 CPU @ 3.40GHz", Debug)
Store ("baseFrequency........: 1600", Debug)
Store ("frequency............: 3400", Debug)
Store ("busFrequency.........: 100", Debug)
Store ("logicalCPUs..........: 8", Debug)
Store ("maximum TDP..........: 77", Debug)
Store ("packageLength........: 24", Debug)
Store ("turboStates..........: 5", Debug)
Store ("maxTurboFrequency....: 3900", Debug)
Store ("machdep.xcpm.mode....: 1", Debug)
}
Name (APLF, Zero)
Name (APSN, 0x04)
Name (APSS, Package (0x18)
XCPM mode not enabled for i5-3570k, z77, Macmini6,2 system?
XCPM mode is disabled whether or not I use -x 1 in ssdtPRGen.sh v13.4. I have tried other smbios's suggested by toledo as suitable but none have enabled xcpm. If I boot using the flag -xcpm then it is enabled. All CPU and GPU P-states are present in AICPUPMI which is great. Can I add a kernel flag to org.chameleon.Boot.plist, or can you patch your script? Thanks.
Last login: Wed May 7 10:38:01 on console
Erics-Mac-Pro:~ ericjhughes$ cd Downloads/ssdtPRGen.sh-master
Erics-Mac-Pro:ssdtPRGen.sh-master ericjhughes$ sudo chmod 755 ssdtPRGen.sh
Password:
Erics-Mac-Pro:ssdtPRGen.sh-master ericjhughes$ ./ssdtPRGen.sh -turbo 4300 -t 72 -w 3 -x 1
This script must be run as root.
ssdtPRGen.sh v0.9 Copyright (c) 2011-2012 by † RevoGirl
v6.6 Copyright (c) 2013 by † Jeroen
v13.4 Copyright (c) 2013-2014 by Pike R. Alpha
Bugs > https://github.com/Piker-Alpha/ssdtPRGen.sh/issues <
Override value: (-turbo) maximum (turbo) frequency, now using: 4300 MHz!
Override value: (-t) maximum TDP, now using: 72 Watt!
Override value: (-w) Ivy Bridge workarounds, now set to: 3!
Override value: (-x) XCPM mode, now set to: 1!
System information: Mac OS X 10.9.2 (13C1021)
Brandstring 'Intel(R) Core(TM) i5-3570K CPU @ 3.40GHz'
Scope (PR) {220 bytes} with ACPI Processor declarations found in the DSDT (ACPI 1.0 compliant)
Generating ssdt.dsl for a 'Macmini6,2' with board-id [Mac-F65AE981FFA204ED]
Ivy Bridge Core i5-3570K processor [0x306A9] setup [0x0601]
With a maximum TDP of '72' Watt, as specified by argument: -t 72
Number logical CPU's: 4 (Core Frequency: 3400 MHz)
Number of Turbo States: 9 (3500-4300 MHz)
Number of P-States: 28 (1600-4300 MHz)
Injected C-States for CPU0 (C1,C3,C6)
Injected C-States for CPU1 (C1,C2,C3)
Warning: 'cpu-type' may be set improperly (0x0601 instead of 0x0701)
Intel ACPI Component Architecture
ASL Optimizing Compiler version 20130117-64 [Jan 19 2013]
Copyright (c) 2000 - 2013 Intel Corporation
ASL Input: /Users/ericjhughes/Desktop/ssdt.dsl - 266 lines, 8721 bytes, 48 keywords
AML Output: /Users/ericjhughes/Desktop/ssdt.aml - 1898 bytes, 16 named objects, 32 executable opcodes
Compilation complete. 0 Errors, 0 Warnings, 0 Remarks, 0 Optimizations
Do you want to copy /Users/ericjhughes/Desktop/ssdt.aml to /Extra/ssdt.aml? (y/n)? n
Do you want to open ssdt.dsl (y/n)?
Errors with 9.5 (i7 3770k)
I ran the script and got some interesting output.
ssdtPRGen.sh v0.9 Copyright (c) 2011-2012 by † RevoGirl
v6.6 Copyright (c) 2013 by † Jeroen
v9.5 Copyright (c) 2013-2014 by Pike R. Alpha
-----------------------------------------------------------------
System information: Mac OS X 10.9.1 (13B42)
Brandstring 'Intel(R) Core(TM) i7-3770K CPU @ 3.50GHz'
Name (_HID, "ACPI0004") NOT found in the DSDT
Processor {} Declaration(s) found in DSDT (ACPI 1.0 compliant)
Generating ssdt_pr.dsl for a iMac13,2 [Mac-FC02E91DDD3FA6A4]
Ivy Bridge Core i7-3770K processor [0x306A9] setup [0x0704]
With a maximum TDP of 77 Watt, as specified by Intel
Number logical CPU's: 8 (Core Frequency: 3500 MHz)
Number of Turbo States: 4 (3600-3900 MHz)
Number of P-States: 24 (1600-3900 MHz)
./ssdtPRGen.sh: line 834: printf: 77*1000: invalid number
./ssdtPRGen.sh: line 902: printf: 77*1000: invalid number
./ssdtPRGen.sh: line 902: printf: 77*1000: invalid number
./ssdtPRGen.sh: line 902: printf: 77*1000: invalid number
./ssdtPRGen.sh: line 902: printf: 77*1000: invalid number
./ssdtPRGen.sh: line 902: printf: 77*1000: invalid number
Injected C-States for CPU0 (C1,C3,C6)
Injected C-States for CPU1 (C1,C2,C3)
Password:
Intel ACPI Component Architecture
ASL Optimizing Compiler version 20130117-64 [Jan 19 2013]
Copyright (c) 2000 - 2013 Intel Corporation
ASL Input: /Users/hackmodford/Desktop/ssdt_pr.dsl - 314 lines, 9523 bytes, 72 keywords
AML Output: /Users/hackmodford/Desktop/ssdt_pr.aml - 2069 bytes, 28 named objects, 44 executable opcodes
Compilation complete. 0 Errors, 0 Warnings, 0 Remarks, 6 Optimizations
Clover boot.log found
Do you want to copy /Users/hackmodford/Desktop/ssdt_pr.aml to /Extra/ssdt_pr.aml? (y/n)?n
When I reboot I get these messages in the console.
2/7/14 9:11:06.000 AM kernel[0]: XCPM: registered
2/7/14 9:11:07.000 AM kernel[0]: IOPPF: XCPM mode
2/7/14 9:11:07.000 AM kernel[0]: XCPM: P-state table mismatch (error:0x12)
2/7/14 9:11:07.000 AM kernel[0]: X86PlatformShim::sendPStates - pmCPUControl (XCPMIO_SETPSTATETABLE) returned 0x12
Here is the SSDT that was generated
/*
* Intel ACPI Component Architecture
* AML Disassembler version 20100331
*
* Disassembly of iASLtZagWz.aml, Fri Feb 7 09:15:14 2014
*
*
* Original Table Header:
* Signature "SSDT"
* Length 0x00000815 (2069)
* Revision 0x01
* Checksum 0x62
* OEM ID "APPLE "
* OEM Table ID "CpuPm"
* OEM Revision 0x00009500 (38144)
* Compiler ID "INTL"
* Compiler Version 0x20130117 (538116375)
*/
DefinitionBlock ("iASLtZagWz.aml", "SSDT", 1, "APPLE ", "CpuPm", 0x00009500)
{
External (\_PR_.CPU7, DeviceObj)
External (\_PR_.CPU6, DeviceObj)
External (\_PR_.CPU5, DeviceObj)
External (\_PR_.CPU4, DeviceObj)
External (\_PR_.CPU3, DeviceObj)
External (\_PR_.CPU2, DeviceObj)
External (\_PR_.CPU1, DeviceObj)
External (\_PR_.CPU0, DeviceObj)
Scope (\_PR.CPU0)
{
Method (_INI, 0, NotSerialized)
{
Store ("ssdtPRGen version: 9.5 / Mac OS X 10.9.1 (13B42)", Debug)
Store ("target processor : i7-3770K", Debug)
Store ("running processor: Intel(R) Core(TM) i7-3770K CPU @ 3.50GHz", Debug)
Store ("baseFrequency : 1600", Debug)
Store ("frequency : 3500", Debug)
Store ("busFrequency : 100", Debug)
Store ("logicalCPUs : 8", Debug)
Store ("max TDP : 77", Debug)
Store ("packageLength : 24", Debug)
Store ("turboStates : 4", Debug)
Store ("maxTurboFrequency: 3900", Debug)
Store ("gIvyWorkAround : 3", Debug)
Store ("machdep.xcpm.mode: 1", Debug)
}
Name (APLF, 0x08)
Name (APSN, 0x05)
Name (APSS, Package (0x21)
{
Package (0x06)
{
0x0F3D,
Zero,
0x0A,
0x0A,
0x2800,
0x2800
},
Package (0x06)
{
0x0F3C,
Zero,
0x0A,
0x0A,
0x2700,
0x2700
},
Package (0x06)
{
0x0ED8,
Zero,
0x0A,
0x0A,
0x2600,
0x2600
},
Package (0x06)
{
0x0E74,
Zero,
0x0A,
0x0A,
0x2500,
0x2500
},
Package (0x06)
{
0x0E10,
Zero,
0x0A,
0x0A,
0x2400,
0x2400
},
Package (0x06)
{
0x0DAC,
Zero,
0x0A,
0x0A,
0x2300,
0x2300
},
Package (0x06)
{
0x0D48,
0x000120E0,
0x0A,
0x0A,
0x2200,
0x2200
},
Package (0x06)
{
0x0CE4,
0x0001152F,
0x0A,
0x0A,
0x2100,
0x2100
},
Package (0x06)
{
0x0C80,
0x000109B4,
0x0A,
0x0A,
0x2000,
0x2000
},
Package (0x06)
{
0x0C1C,
0xFE6F,
0x0A,
0x0A,
0x1F00,
0x1F00
},
Package (0x06)
{
0x0BB8,
0xF35F,
0x0A,
0x0A,
0x1E00,
0x1E00
},
Package (0x06)
{
0x0B54,
0xE884,
0x0A,
0x0A,
0x1D00,
0x1D00
},
Package (0x06)
{
0x0AF0,
0xDDDD,
0x0A,
0x0A,
0x1C00,
0x1C00
},
Package (0x06)
{
0x0A8C,
0xD36A,
0x0A,
0x0A,
0x1B00,
0x1B00
},
Package (0x06)
{
0x0A28,
0xC92B,
0x0A,
0x0A,
0x1A00,
0x1A00
},
Package (0x06)
{
0x09C4,
0xBF1F,
0x0A,
0x0A,
0x1900,
0x1900
},
Package (0x06)
{
0x0960,
0xB546,
0x0A,
0x0A,
0x1800,
0x1800
},
Package (0x06)
{
0x08FC,
0xAB9F,
0x0A,
0x0A,
0x1700,
0x1700
},
Package (0x06)
{
0x0898,
0xA229,
0x0A,
0x0A,
0x1600,
0x1600
},
Package (0x06)
{
0x0834,
0x98E6,
0x0A,
0x0A,
0x1500,
0x1500
},
Package (0x06)
{
0x07D0,
0x8FD3,
0x0A,
0x0A,
0x1400,
0x1400
},
Package (0x06)
{
0x076C,
0x86F1,
0x0A,
0x0A,
0x1300,
0x1300
},
Package (0x06)
{
0x0708,
0x7E3F,
0x0A,
0x0A,
0x1200,
0x1200
},
Package (0x06)
{
0x06A4,
0x75BD,
0x0A,
0x0A,
0x1100,
0x1100
},
Package (0x06)
{
0x0640,
0x6D6A,
0x0A,
0x0A,
0x1000,
0x1000
},
Package (0x06)
{
0x05DC,
Zero,
0x0A,
0x0A,
0x0F00,
0x0F00
},
Package (0x06)
{
0x0578,
Zero,
0x0A,
0x0A,
0x0E00,
0x0E00
},
Package (0x06)
{
0x0514,
Zero,
0x0A,
0x0A,
0x0D00,
0x0D00
},
Package (0x06)
{
0x04B0,
Zero,
0x0A,
0x0A,
0x0C00,
0x0C00
},
Package (0x06)
{
0x044C,
Zero,
0x0A,
0x0A,
0x0B00,
0x0B00
},
Package (0x06)
{
0x03E8,
Zero,
0x0A,
0x0A,
0x0A00,
0x0A00
},
Package (0x06)
{
0x0384,
Zero,
0x0A,
0x0A,
0x0900,
0x0900
},
Package (0x06)
{
0x0320,
Zero,
0x0A,
0x0A,
0x0800,
0x0800
}
})
Method (ACST, 0, NotSerialized)
{
Store ("Method CPU0.ACST Called", Debug)
Store ("CPU0 C-States : 13", Debug)
Return (Package (0x05)
{
One,
0x03,
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000000, // Address
0x01, // Access Size
)
},
One,
Zero,
0x03E8
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000010, // Address
0x03, // Access Size
)
},
0x03,
0xCD,
0x01F4
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000020, // Address
0x03, // Access Size
)
},
0x06,
0xF5,
0x015E
}
})
}
Method (_DSM, 4, NotSerialized)
{
Store ("Method CPU0._DSM Called", Debug)
If (LEqual (Arg2, Zero))
{
Return (Buffer (One)
{
0x03
})
}
Return (Package (0x02)
{
"plugin-type",
One
})
}
}
Scope (\_PR.CPU1)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method CPU1.APSS Called", Debug)
Return (\_PR.CPU0.APSS)
}
Method (ACST, 0, NotSerialized)
{
Store ("Method CPU1.ACST Called", Debug)
Store ("CPU1 C-States : 7", Debug)
Return (Package (0x05)
{
One,
0x03,
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000000, // Address
0x01, // Access Size
)
},
One,
0x03E8,
0x03E8
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000010, // Address
0x03, // Access Size
)
},
0x02,
0x94,
0x01F4
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000020, // Address
0x03, // Access Size
)
},
0x03,
0xA9,
0x015E
}
})
}
}
Scope (\_PR.CPU2)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method CPU2.APSS Called", Debug)
Return (\_PR.CPU0.APSS)
}
Method (ACST, 0, NotSerialized)
{
Return (\_PR.CPU1.ACST ())
}
}
Scope (\_PR.CPU3)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method CPU3.APSS Called", Debug)
Return (\_PR.CPU0.APSS)
}
Method (ACST, 0, NotSerialized)
{
Return (\_PR.CPU1.ACST ())
}
}
Scope (\_PR.CPU4)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method CPU4.APSS Called", Debug)
Return (\_PR.CPU0.APSS)
}
Method (ACST, 0, NotSerialized)
{
Return (\_PR.CPU1.ACST ())
}
}
Scope (\_PR.CPU5)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method CPU5.APSS Called", Debug)
Return (\_PR.CPU0.APSS)
}
Method (ACST, 0, NotSerialized)
{
Return (\_PR.CPU1.ACST ())
}
}
Scope (\_PR.CPU6)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method CPU6.APSS Called", Debug)
Return (\_PR.CPU0.APSS)
}
Method (ACST, 0, NotSerialized)
{
Return (\_PR.CPU1.ACST ())
}
}
Scope (\_PR.CPU7)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method CPU7.APSS Called", Debug)
Return (\_PR.CPU0.APSS)
}
Method (ACST, 0, NotSerialized)
{
Return (\_PR.CPU1.ACST ())
}
}
}
4930K still not working
Unfortunately, the script is still not working for 4930K. With the latest version, I get:
09/02/14 19:28:30,000 kernel[0]: WARNING: IOPlatformPluginUtil : getCPUIDInfo: this is an unknown CPU model 0x3e
09/02/14 19:28:30,000 kernel[0]: -- power management may be incomplete or unsupported
09/02/14 19:28:30,000 kernel[0]: ACPI_SMC_PlatformPlugin::pushCPU_CSTData - _CST evaluation failed
09/02/14 19:28:37,000 kernel[0]: ACPI_SMC_PlatformPlugin::pushCPU_CSTData - _CST evaluation failed
09/02/14 19:28:37,000 kernel[0]: ACPI_SMC_PlatformPlugin::registerLPCDriver - WARNING - LPC device initialization failed: C-state power management not initialized
Here is the script generated:
/*
* Intel ACPI Component Architecture
* AML Disassembler version 20130210-00 [Feb 10 2013]
* Copyright (c) 2000 - 2014 Intel Corporation
*
* Original Table Header:
* Signature "SSDT"
* Length 0x0000036A (874)
* Revision 0x01
* Checksum 0x00
* OEM ID "APPLE "
* OEM Table ID "CpuPm"
* OEM Revision 0x00010000 (65536)
* Compiler ID "INTL"
* Compiler Version 0x20130210 (538116624)
*/
DefinitionBlock ("ssdt.aml", "SSDT", 1, "APPLE ", "CpuPm", 0x00010000)
{
External (\_SB_.C000, DeviceObj)
External (\_SB_.C001, DeviceObj)
External (\_SB_.C002, DeviceObj)
External (\_SB_.C003, DeviceObj)
External (\_SB_.C004, DeviceObj)
External (\_SB_.C005, DeviceObj)
External (\_SB_.C006, DeviceObj)
External (\_SB_.C007, DeviceObj)
External (\_SB_.C008, DeviceObj)
External (\_SB_.C009, DeviceObj)
External (\_SB_.C00A, DeviceObj)
External (\_SB_.C00B, DeviceObj)
Scope (\_SB_.C000)
{
Method (_INI, 0, NotSerialized)
{
Store ("ssdtPRGen version: 10.0 / Mac OS X 10.9.2 (13C53)", Debug)
Store ("target processor : i7-4930K", Debug)
Store ("running processor: Intel(R) Core(TM) i7-4930K CPU @ 3.40GHz", Debug)
Store ("baseFrequency : 1200", Debug)
Store ("frequency : 3400", Debug)
Store ("busFrequency : 100", Debug)
Store ("logicalCPUs : 12", Debug)
Store ("max TDP : 130", Debug)
Store ("packageLength : 28", Debug)
Store ("turboStates : 5", Debug)
Store ("maxTurboFrequency: 3900", Debug)
Store ("gIvyWorkAround : 3", Debug)
Store ("machdep.xcpm.mode: 0", Debug)
}
Name (APLF, 0x04)
Name (APSN, 0x06)
Name (APSS, Package (0x21)
{
/* Workaround for the Ivy Bridge PM 'bug' */
Package (0x06) { 0x0F3D, 0x01FBD0, 0x0A, 0x0A, 0x2800, 0x2800 },
/* High Frequency Modes (turbo) */
Package (0x06) { 0x0F3C, 0x01FBD0, 0x0A, 0x0A, 0x2700, 0x2700 },
Package (0x06) { 0x0ED8, 0x01FBD0, 0x0A, 0x0A, 0x2600, 0x2600 },
Package (0x06) { 0x0E74, 0x01FBD0, 0x0A, 0x0A, 0x2500, 0x2500 },
Package (0x06) { 0x0E10, 0x01FBD0, 0x0A, 0x0A, 0x2400, 0x2400 },
Package (0x06) { 0x0DAC, 0x01FBD0, 0x0A, 0x0A, 0x2300, 0x2300 },
/* High Frequency Modes (non-turbo) */
Package (0x06) { 0x0D48, 0x01FBD0, 0x0A, 0x0A, 0x2200, 0x2200 },
Package (0x06) { 0x0CE4, 0x01E74A, 0x0A, 0x0A, 0x2100, 0x2100 },
Package (0x06) { 0x0C80, 0x01D323, 0x0A, 0x0A, 0x2000, 0x2000 },
Package (0x06) { 0x0C1C, 0x01BF5A, 0x0A, 0x0A, 0x1F00, 0x1F00 },
Package (0x06) { 0x0BB8, 0x01ABEE, 0x0A, 0x0A, 0x1E00, 0x1E00 },
Package (0x06) { 0x0B54, 0x0198DF, 0x0A, 0x0A, 0x1D00, 0x1D00 },
Package (0x06) { 0x0AF0, 0x01862B, 0x0A, 0x0A, 0x1C00, 0x1C00 },
Package (0x06) { 0x0A8C, 0x0173D2, 0x0A, 0x0A, 0x1B00, 0x1B00 },
Package (0x06) { 0x0A28, 0x0161D3, 0x0A, 0x0A, 0x1A00, 0x1A00 },
Package (0x06) { 0x09C4, 0x01502D, 0x0A, 0x0A, 0x1900, 0x1900 },
Package (0x06) { 0x0960, 0x013EE0, 0x0A, 0x0A, 0x1800, 0x1800 },
Package (0x06) { 0x08FC, 0x012DEB, 0x0A, 0x0A, 0x1700, 0x1700 },
Package (0x06) { 0x0898, 0x011D4D, 0x0A, 0x0A, 0x1600, 0x1600 },
Package (0x06) { 0x0834, 0x010D06, 0x0A, 0x0A, 0x1500, 0x1500 },
Package (0x06) { 0x07D0, 0x00FD14, 0x0A, 0x0A, 0x1400, 0x1400 },
Package (0x06) { 0x076C, 0x00ED77, 0x0A, 0x0A, 0x1300, 0x1300 },
Package (0x06) { 0x0708, 0x00DE2E, 0x0A, 0x0A, 0x1200, 0x1200 },
Package (0x06) { 0x06A4, 0x00CF39, 0x0A, 0x0A, 0x1100, 0x1100 },
Package (0x06) { 0x0640, 0x00C096, 0x0A, 0x0A, 0x1000, 0x1000 },
Package (0x06) { 0x05DC, 0x00B246, 0x0A, 0x0A, 0x0F00, 0x0F00 },
Package (0x06) { 0x0578, 0x00A446, 0x0A, 0x0A, 0x0E00, 0x0E00 },
Package (0x06) { 0x0514, 0x009697, 0x0A, 0x0A, 0x0D00, 0x0D00 },
/* Low Frequency Mode */
Package (0x06) { 0x04B0, 0x008938, 0x0A, 0x0A, 0x0C00, 0x0C00 },
Package (0x06) { 0x044C, Zero, 0x0A, 0x0A, 0x0B00, 0x0B00 },
Package (0x06) { 0x03E8, Zero, 0x0A, 0x0A, 0x0A00, 0x0A00 },
Package (0x06) { 0x0384, Zero, 0x0A, 0x0A, 0x0900, 0x0900 },
Package (0x06) { 0x0320, Zero, 0x0A, 0x0A, 0x0800, 0x0800 }
})
Method (ACST, 0, NotSerialized)
{
Store ("Method C000.ACST Called", Debug)
Store ("C000 C-States : 13", Debug)
/* Low Power Modes for C000 */
Return (Package (0x05)
{
One,
0x03,
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000000, // Address
0x01, // Access Size
)
},
One,
Zero,
0x03E8
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000010, // Address
0x03, // Access Size
)
},
0x03,
0xCD,
0x01F4
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000020, // Address
0x03, // Access Size
)
},
0x06,
0xF5,
0x015E
}
})
}
Method (_DSM, 4, NotSerialized)
{
Store ("Method C000._DSM Called", Debug)
If (LEqual (Arg2, Zero))
{
Return (Buffer (One)
{
0x03
})
}
Return (Package (0x02)
{
"plugin-type",
One
})
}
}
Scope (\_SB_.C001)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method C001.APSS Called", Debug)
Return (\_SB_.C000.APSS)
}
Method (ACST, 0, NotSerialized)
{
Store ("Method C001.ACST Called", Debug)
Store ("C001 C-States : 13", Debug)
/* Low Power Modes for C001 */
Return (Package (0x05)
{
One,
0x03,
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000000, // Address
0x01, // Access Size
)
},
One,
0x03E8,
0x03E8
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000020, // Address
0x03, // Access Size
)
},
0x03,
0xC6,
0xC8
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000030, // Address
0x03, // Access Size
)
},
0x06,
0xF5,
0x015E
}
})
}
}
Scope (\_SB_.C002)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method C002.APSS Called", Debug)
Return (\_SB_.C000.APSS)
}
Method (ACST, 0, NotSerialized) { Return (\_SB_.C001.ACST ()) }
}
Scope (\_SB_.C003)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method C003.APSS Called", Debug)
Return (\_SB_.C000.APSS)
}
Method (ACST, 0, NotSerialized) { Return (\_SB_.C001.ACST ()) }
}
Scope (\_SB_.C004)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method C004.APSS Called", Debug)
Return (\_SB_.C000.APSS)
}
Method (ACST, 0, NotSerialized) { Return (\_SB_.C001.ACST ()) }
}
Scope (\_SB_.C005)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method C005.APSS Called", Debug)
Return (\_SB_.C000.APSS)
}
Method (ACST, 0, NotSerialized) { Return (\_SB_.C001.ACST ()) }
}
Scope (\_SB_.C006)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method C006.APSS Called", Debug)
Return (\_SB_.C000.APSS)
}
Method (ACST, 0, NotSerialized) { Return (\_SB_.C001.ACST ()) }
}
Scope (\_SB_.C007)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method C007.APSS Called", Debug)
Return (\_SB_.C000.APSS)
}
Method (ACST, 0, NotSerialized) { Return (\_SB_.C001.ACST ()) }
}
Scope (\_SB_.C008)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method C008.APSS Called", Debug)
Return (\_SB_.C000.APSS)
}
Method (ACST, 0, NotSerialized) { Return (\_SB_.C001.ACST ()) }
}
Scope (\_SB_.C009)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method C009.APSS Called", Debug)
Return (\_SB_.C000.APSS)
}
Method (ACST, 0, NotSerialized) { Return (\_SB_.C001.ACST ()) }
}
Scope (\_SB_.C00A)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method C00A.APSS Called", Debug)
Return (\_SB_.C000.APSS)
}
Method (ACST, 0, NotSerialized) { Return (\_SB_.C001.ACST ()) }
}
Scope (\_SB_.C00B)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method C00B.APSS Called", Debug)
Return (\_SB_.C000.APSS)
}
Method (ACST, 0, NotSerialized) { Return (\_SB_.C001.ACST ()) }
}
}
Take a look at the low freq values, seem a bit weird (the zero values)
Also I get the message:
Warning: 'system-type' may be set improperly (1 instead of 3)
Warning: only 43 of 120 processor declarations found in device SCK0!
Hi Pike,
running v.12 produces this output:
ssdtPRGen.sh v0.9 Copyright (c) 2011-2012 by † RevoGirl
v6.6 Copyright (c) 2013 by † Jeroen
v12.0 Copyright (c) 2013-2014 by Pike R. Alpha
Bugs > https://github.com/Piker-Alpha/ssdtPRGen.sh/issues <
System information: Mac OS X 10.9.2 (13C62)
Brandstring 'Intel(R) Xeon(R) CPU E5-2690 v2 @ 3.00GHz'
Warning: only 43 of 120 processor declarations found in device SCK0!
Generating ssdt.dsl for a 'MacPro6,1' with board-id [Mac-F60DEB81FF30ACF6]
Ivy Bridge Core E5-2690 v2 processor [0x306E4] setup [0x0a01]
With a maximum TDP of 130 Watt, as specified by Intel
Number logical CPU's: 20 (Core Frequency: 3000 MHz)
Number of Turbo States: 6 (3100-3600 MHz)
Number of P-States: 25 (1200-3600 MHz)
Injected C-States for C000 (C1,C3,C6)
Injected C-States for C001 (C1,C3,C6)
Intel ACPI Component Architecture
ASL Optimizing Compiler version 20130117-64 [Jan 19 2013]
Copyright (c) 2000 - 2013 Intel Corporation
ASL Input: /Users/fabio/Desktop/ssdt.dsl - 890 lines, 28854 bytes, 156 keywords
AML Output: /Users/fabio/Desktop/ssdt.aml - 5749 bytes, 70 named objects, 86 executable opcodes
Compilation complete. 0 Errors, 0 Warnings, 0 Remarks, 0 Optimizations
Do you want to copy /Users/fabio/Desktop/ssdt.aml to /Extra/ssdt.aml? (y/n)?
XCPM: P-state table mismatch (error:0x12)
Hi Piker,
I'm having problems to enable XCPM on my machine.
I've described my problem in this post:
I've followed your steps here and I've generated the SSDT.aml using "-w 1/2/3" and the result is the same but changes the value of the error depending of "-w" value (0x11, 0x12 and 0x13). Also, I tried to remove the flag "-x" and the result is the same. So I tested "-w 1/2/3 -x 1" and "-w 1/2/3 -x 0" getting the same error in all cases. I active the XCPM directly on the kernel flags from Clover (-xcpm).
Furthermore, the booting is very unstable, I'm only able to get the desktop after 2 or 3 KP.
I think it's very detailed on my post.
Could you check it? Thank very much for your time.
Cheers.
X86PlatformShim::start – Failed to send PStates
PM kernel[0]: IOPPF: XCPM mode
PM kernel[0]: XCPM: P-state table mismatch (error:0x11)
PM kernel[0]: X86PlatformShim::sendPStates - pmCPUControl (XCPMIO_SETPSTATETABLE) returned 0x11
PM kernel[0]: X86PlatformShim::start - Failed to send PStates
PM kernel[0]: X86PlatformShim::start - Failed to send stepper
issue MSR Package
Hi Pike , i have this strange value on MSR Package , on i7 4770K
Please what is this error?
Apr 28 20:47:51 prodimagnifico kernel[0]: AICPUPMI: MSR_TURBO_ACTIVATION_RATIO.(0x64c) : 0x0
Apr 28 20:47:51 prodimagnifico kernel[0]: AICPUPMI: MSR_PKG_C2_RESIDENCY.......(0x60d) : 0x0
Apr 28 20:47:51 prodimagnifico kernel[0]: AICPUPMI: MSR_PKG_C3_RESIDENCY.......(0x3f8) : 0x0
Apr 28 20:47:51 prodimagnifico kernel[0]: AICPUPMI: MSR_PKG_C6_RESIDENCY.......(0x3f9) : 0x0
Apr 28 20:47:51 prodimagnifico kernel[0]: AICPUPMI: MSR_PKG_C7_RESIDENCY.......(0x3fa) : 0x0
Apr 28 20:47:51 prodimagnifico kernel[0]: AICPUPMI: CPU Low Frequency Mode.............: 800 MHz
Apr 28 20:47:51 prodimagnifico kernel[0]: AICPUPMI: CPU Maximum non-Turbo Frequency....: 3500 MHz
Apr 28 20:47:51 prodimagnifico kernel[0]: AICPUPMI: CPU Maximum Turbo Frequency........: 4700 MHz
ssdtPRGen.sh v13.0 don't work for my i5 3210M - Clock stuck
Hi.
I test the new script v13.0, but my clock stuck in 700Mhz.
[IMG]http://i.imgur.com/W9I9Jed.png[/IMG]
![http://i.imgur.com/W9I9Jed.png[/IMG]](http://i.imgur.com/W9I9Jed.png%5B/IMG%5D){kind=link}
Console:
Apr 10 14:53:04 Allans-MacBook-Pro kernel[0]: AICPUPMI: v3.3 Copyright © 2012-2014 Pike R. Alpha. All rights reserved
Apr 10 14:53:04 Allans-MacBook-Pro kernel[0]: AICPUPMI: logMSRs............................: 1
Apr 10 14:53:04 Allans-MacBook-Pro kernel[0]: AICPUPMI: logIGPU............................: 0
Apr 10 14:53:04 Allans-MacBook-Pro kernel[0]: AICPUPMI: logCStates.........................: 1
Apr 10 14:53:04 Allans-MacBook-Pro kernel[0]: AICPUPMI: logIPGStyle........................: 1
Apr 10 14:53:04 Allans-MacBook-Pro kernel[0]: AICPUPMI: MWAIT C-States.....................: 135456
Apr 10 14:53:04 Allans-MacBook-Pro kernel[0]: AICPUPMI: MSR_CORE_THREAD_COUNT......(0x35) : 0x20004
Apr 10 14:53:04 Allans-MacBook-Pro kernel[0]: AICPUPMI: MSR_PLATFORM_INFO..........(0xCE) : 0x80C10E0011900
Apr 10 14:53:04 Allans-MacBook-Pro kernel[0]: AICPUPMI: MSR_PMG_CST_CONFIG_CONTROL.(0xE2) : 0x1E008404
Apr 10 14:53:04 Allans-MacBook-Pro kernel[0]: AICPUPMI: MSR_PMG_IO_CAPTURE_BASE....(0xE4) : 0x20414
Apr 10 14:53:04 Allans-MacBook-Pro kernel[0]: AICPUPMI: IA32_MPERF.................(0xE7) : 0xD82D7AA
Apr 10 14:53:04 Allans-MacBook-Pro kernel[0]: AICPUPMI: IA32_APERF.................(0xE8) : 0x454AA5E
Apr 10 14:53:04 Allans-MacBook-Pro kernel[0]: AICPUPMI: MSR_FLEX_RATIO.............(0x194) : 0x100000
Apr 10 14:53:04 Allans-MacBook-Pro kernel[0]: AICPUPMI: MSR_IA32_PERF_STATUS.......(0x198) : 0x1ABD00000800
Apr 10 14:53:04 Allans-MacBook-Pro kernel[0]: AICPUPMI: MSR_IA32_PERF_CONTROL......(0x199) : 0x800
Apr 10 14:53:04 Allans-MacBook-Pro kernel[0]: AICPUPMI: IA32_CLOCK_MODULATION......(0x19A) : 0x8
Apr 10 14:53:04 Allans-MacBook-Pro kernel[0]: AICPUPMI: IA32_THERM_STATUS..........(0x19C) : 0x883D0000
Apr 10 14:53:04 Allans-MacBook-Pro kernel[0]: AICPUPMI: IA32_MISC_ENABLES..........(0x1A0) : 0x850089
Apr 10 14:53:04 Allans-MacBook-Pro kernel[0]: AICPUPMI: MSR_MISC_PWR_MGMT..........(0x1AA) : 0x400001
Apr 10 14:53:04 Allans-MacBook-Pro kernel[0]: AICPUPMI: MSR_TURBO_RATIO_LIMIT......(0x1AD) : 0x1D1D1D1F
Apr 10 14:53:04 Allans-MacBook-Pro kernel[0]: AICPUPMI: IA32_ENERGY_PERF_BIAS......(0x1B0) : 0x4
Apr 10 14:53:04 Allans-MacBook-Pro kernel[0]: AICPUPMI: MSR_POWER_CTL..............(0x1FC) : 0x14005F
Apr 10 14:53:04 Allans-MacBook-Pro kernel[0]: AICPUPMI: MSR_RAPL_POWER_UNIT........(0x606) : 0xA1003
Apr 10 14:53:04 Allans-MacBook-Pro kernel[0]: AICPUPMI: MSR_PKG_POWER_LIMIT........(0x610) : 0x8000815E00DC8118
Apr 10 14:53:04 Allans-MacBook-Pro kernel[0]: AICPUPMI: MSR_PKG_ENERGY_STATUS......(0x611) : 0x3182A1B
Apr 10 14:53:04 Allans-MacBook-Pro kernel[0]: AICPUPMI: MSR_PKGC3_IRTL.............(0x60a) : 0x883B
Apr 10 14:53:04 Allans-MacBook-Pro kernel[0]: AICPUPMI: MSR_PKGC6_IRTL.............(0x60b) : 0x8850
Apr 10 14:53:04 Allans-MacBook-Pro kernel[0]: AICPUPMI: MSR_PKGC7_IRTL.............(0x60c) : 0x8857
Apr 10 14:53:04 Allans-MacBook-Pro kernel[0]: AICPUPMI: MSR_PP0_CURRENT_CONFIG.....(0x601) : 0x1814149480000380
Apr 10 14:53:04 Allans-MacBook-Pro kernel[0]: AICPUPMI: MSR_PP0_POWER_LIMIT........(0x638) : 0x0
Apr 10 14:53:04 Allans-MacBook-Pro kernel[0]: AICPUPMI: MSR_PP0_ENERGY_STATUS......(0x639) : 0x11F8803
Apr 10 14:53:04 Allans-MacBook-Pro kernel[0]: AICPUPMI: MSR_PP0_POLICY.............(0x63a) : 0x0
Apr 10 14:53:04 Allans-MacBook-Pro kernel[0]: AICPUPMI: MSR_CONFIG_TDP_NOMINAL.....(0x648) : 0x19
Apr 10 14:53:04 Allans-MacBook-Pro kernel[0]: AICPUPMI: MSR_CONFIG_TDP_LEVEL1......(0x649) : 0xC0000000000000
Apr 10 14:53:04 Allans-MacBook-Pro kernel[0]: AICPUPMI: MSR_CONFIG_TDP_LEVEL2......(0x64a) : 0xC0000000000000
Apr 10 14:53:04 Allans-MacBook-Pro kernel[0]: AICPUPMI: MSR_CONFIG_TDP_CONTROL.....(0x64b) : 0x80000000
Apr 10 14:53:04 Allans-MacBook-Pro kernel[0]: AICPUPMI: MSR_TURBO_ACTIVATION_RATIO.(0x64c) : 0x0
Apr 10 14:53:04 Allans-MacBook-Pro kernel[0]: AICPUPMI: MSR_PKG_C2_RESIDENCY.......(0x60d) : 0x250F9FA8B
Apr 10 14:53:04 Allans-MacBook-Pro kernel[0]: AICPUPMI: MSR_PKG_C3_RESIDENCY.......(0x3f8) : 0x6471B56
Apr 10 14:53:04 Allans-MacBook-Pro kernel[0]: AICPUPMI: MSR_PKG_C6_RESIDENCY.......(0x3f9) : 0x293C50C5C
Apr 10 14:53:04 Allans-MacBook-Pro kernel[0]: AICPUPMI: MSR_PKG_C7_RESIDENCY.......(0x3fa) : 0x41740A2386
Apr 10 14:53:04 Allans-MacBook-Pro kernel[0]: AICPUPMI: CPU Low Frequency Mode.............: 1200 MHz
Apr 10 14:53:04 Allans-MacBook-Pro kernel[0]: AICPUPMI: CPU Maximum non-Turbo Frequency....: 2500 MHz
Apr 10 14:53:04 Allans-MacBook-Pro kernel[0]: AICPUPMI: CPU Maximum Turbo Frequency........: 3100 MHz
Apr 10 14:53:05 Allans-MacBook-Pro kernel[0]: AICPUPMI: CPU P-States [ ]
Apr 10 14:53:05 Allans-MacBook-Pro kernel[0]: AICPUPMI: CPU C3-Cores [ 1 2 3 ]
Apr 10 14:53:05 Allans-MacBook-Pro kernel[0]: AICPUPMI: CPU C6-Cores [ 0 1 2 3 ]
Apr 10 14:53:05 Allans-MacBook-Pro kernel[0]: AICPUPMI: CPU C7-Cores [ 0 1 2 3 ]
Apr 10 14:53:05 Allans-MacBook-Pro kernel[0]: AICPUPMI: CPU C3-Cores [ 0 1 2 3 ]
Apr 10 14:53:23 Allans-MacBook-Pro kernel[0]: AICPUPMI: CPU P-States [ ]
Bridge type override (SB->IB) (plugin-type property 1) {X86PlatformPlugin} not loaded
Concerning ssdtPRGen.sh v11.0
Sorry Pike, I have a issue with bridge type override (SB->IB) i7-3930k SB-E processor.
Result ioreg: {ACPI_SMC_PlatformPlugin}.
It seems that [plugin-type one] not there anymore in the generated ssdt to load {X86PlatformPlugin} at boot, Instead of {ACPI_SMC_PlatformPlugin} loaded.
[missing code]
Method (_DSM, 4, NotSerialized)
{
Store ("Method C000._DSM Called", Debug)
If (LEqual (Arg2, Zero))
{
Return (Buffer (One)
{
0x03
})
}
Return (Package (0x02)
{
"plugin-type",
One
})
}
}
[command]
sudo ./ssdtPRGen-v11.0.sh -b Mac-F60DEB81FF30ACF6 -c 1 -d 1 -f 3200 -m MacPro6,1 -turbo 3800 -t 130 -w 3 -x 0
[result]
Override value: (-b) board-id, now using: Mac-F60DEB81FF30ACF6!
Override value: (-c) CPU type, now using: Ivy Bridge!
Override value: (-f) clock frequency, now using: 3200 MHz!
Override value: (-m) model, now using: MacPro6,1!
Override value: (-turbo) maximum (turbo) frequency, now using: 3800 MHz!
Override value: (-t) maximum TDP, now using: 130 Watt!
Override value: (-w) Ivy Bridge workarounds, now set to: 3!
Override value: (-x) XCPM mode, now set to: 0!
System information: Mac OS X 10.9.2 (13C59)
Brandstring 'Intel(R) Core(TM) i7-3930K CPU @ 3.20GHz'
Scope (SB) {22 bytes} without Processor declarations ...
Scope (SB) {86 bytes} without Processor declarations ...
Scope (_SB) {24 bytes} without Processor declarations ...
Scope (_SB) {88 bytes} without Processor declarations ...
Scope (SB) {152 bytes} without Processor declarations ...
Scope (SB) {16 bytes} without Processor declarations ...
Scope (SB) {76 bytes} with Processor declarations found in the DSDT (ACPI 1.0 compliant)
Generating ssdt.dsl for a 'MacPro6,1' with board-id [Mac-F60DEB81FF30ACF6]
Sandy Bridge Core i7-3930K processor [0x206D7] setup [0x0703]
With a maximum TDP of '130' Watt, as specified by argument: -t 130
Number logical CPU's: 12 (Core Frequency: 3200 MHz)
Number of Turbo States: 6 (3300-3800 MHz)
Number of P-States: 27 (1200-3800 MHz)
Injected C-States for C000 (C1,C3,C6,C7)
Warning: 'cpu-type' may be set improperly (0x0703 instead of 0x0a03)
Warning: 'system-type' may be set improperly (1 instead of 2)
[generated ssdt]
/*
-
Intel ACPI Component Architecture
-
AML Disassembler version 20100331
* -
Disassembly of iASLlId3aQ.aml, Mon Feb 17 14:14:00 2014
*
* -
Original Table Header:
-
Signature "SSDT" -
Length 0x00000785 (1925) -
Revision 0x01 -
Checksum 0x3C -
OEM ID "APPLE " -
OEM Table ID "CpuPm" -
OEM Revision 0x00011000 (69632) -
Compiler ID "INTL" -
Compiler Version 0x20130117 (538116375)*/
DefinitionBlock ("iASLlId3aQ.aml", "SSDT", 1, "APPLE ", "CpuPm", 0x00011000)
{
External (SB.C00B, DeviceObj)
External (SB.C00A, DeviceObj)
External (SB.C009, DeviceObj)
External (SB.C008, DeviceObj)
External (SB.C007, DeviceObj)
External (SB.C006, DeviceObj)
External (SB.C005, DeviceObj)
External (SB.C004, DeviceObj)
External (SB.C003, DeviceObj)
External (SB.C002, DeviceObj)
External (SB.C001, DeviceObj)
External (SB.C000, DeviceObj)Scope (_SB.C000)
{
Method (_INI, 0, NotSerialized)
{
Store ("ssdtPRGen version: 11.0 / Mac OS X 10.9.2 (13C59)", Debug)
Store ("target processor : i7-3930K", Debug)
Store ("running processor: Intel(R) Core(TM) i7-3930K CPU @ 3.20GHz", Debug)
Store ("baseFrequency : 1200", Debug)
Store ("frequency : 3200", Debug)
Store ("busFrequency : 100", Debug)
Store ("logicalCPUs : 12", Debug)
Store ("maximum TDP : 130", Debug)
Store ("packageLength : 27", Debug)
Store ("turboStates : 6", Debug)
Store ("maxTurboFrequency: 3800", Debug)
Store ("gIvyWorkAround : 3", Debug)
Store ("machdep.xcpm.mode: 0", Debug)
}Name (APSN, 0x06) Name (APSS, Package (0x1B) { Package (0x06) { 0x0ED8, 0x0001FBD0, 0x0A, 0x0A, 0x2600, 0x2600 }, Package (0x06) { 0x0E74, 0x0001FBD0, 0x0A, 0x0A, 0x2500, 0x2500 }, Package (0x06) { 0x0E10, 0x0001FBD0, 0x0A, 0x0A, 0x2400, 0x2400 }, Package (0x06) { 0x0DAC, 0x0001FBD0, 0x0A, 0x0A, 0x2300, 0x2300 }, Package (0x06) { 0x0D48, 0x0001FBD0, 0x0A, 0x0A, 0x2200, 0x2200 }, Package (0x06) { 0x0CE4, 0x0001FBD0, 0x0A, 0x0A, 0x2100, 0x2100 }, Package (0x06) { 0x0C80, 0x0001FBD0, 0x0A, 0x0A, 0x2000, 0x2000 }, Package (0x06) { 0x0C1C, 0x0001E65E, 0x0A, 0x0A, 0x1F00, 0x1F00 }, Package (0x06) { 0x0BB8, 0x0001D150, 0x0A, 0x0A, 0x1E00, 0x1E00 }, Package (0x06) { 0x0B54, 0x0001BCA6, 0x0A, 0x0A, 0x1D00, 0x1D00 }, Package (0x06) { 0x0AF0, 0x0001A85E, 0x0A, 0x0A, 0x1C00, 0x1C00 }, Package (0x06) { 0x0A8C, 0x00019477, 0x0A, 0x0A, 0x1B00, 0x1B00 }, Package (0x06) { 0x0A28, 0x000180F1, 0x0A, 0x0A, 0x1A00, 0x1A00 }, Package (0x06) { 0x09C4, 0x00016DCC, 0x0A, 0x0A, 0x1900, 0x1900 }, Package (0x06) { 0x0960, 0x00015B05, 0x0A, 0x0A, 0x1800, 0x1800 }, Package (0x06) { 0x08FC, 0x0001489D, 0x0A, 0x0A, 0x1700, 0x1700 }, Package (0x06) { 0x0898, 0x00013693, 0x0A, 0x0A, 0x1600, 0x1600 }, Package (0x06) { 0x0834, 0x000124E5, 0x0A, 0x0A, 0x1500, 0x1500 }, Package (0x06) { 0x07D0, 0x00011394, 0x0A, 0x0A, 0x1400, 0x1400 }, Package (0x06) { 0x076C, 0x0001029D, 0x0A, 0x0A, 0x1300, 0x1300 }, Package (0x06) { 0x0708, 0xF201, 0x0A, 0x0A, 0x1200, 0x1200 }, Package (0x06) { 0x06A4, 0xE1BF, 0x0A, 0x0A, 0x1100, 0x1100 }, Package (0x06) { 0x0640, 0xD1D6, 0x0A, 0x0A, 0x1000, 0x1000 }, Package (0x06) { 0x05DC, 0xC245, 0x0A, 0x0A, 0x0F00, 0x0F00 }, Package (0x06) { 0x0578, 0xB30C, 0x0A, 0x0A, 0x0E00, 0x0E00 }, Package (0x06) { 0x0514, 0xA429, 0x0A, 0x0A, 0x0D00, 0x0D00 }, Package (0x06) { 0x04B0, 0x959B, 0x0A, 0x0A, 0x0C00, 0x0C00 } }) Method (ACST, 0, NotSerialized) { Store ("Method C000.ACST Called", Debug) Store ("C000 C-States : 29", Debug) Return (Package (0x06) { One, 0x04, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000000, // Address 0x01, // Access Size ) }, One, Zero, 0x03E8 }, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000010, // Address 0x03, // Access Size ) }, 0x03, 0xCD, 0x01F4 }, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000020, // Address 0x03, // Access Size ) }, 0x06, 0xF5, 0x015E }, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000030, // Address 0x03, // Access Size ) }, 0x07, 0xF5, 0xC8 } }) }}
Scope (_SB.C001)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method C001.APSS Called", Debug)
Return (_SB.C000.APSS)
}
}Scope (_SB.C002)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method C002.APSS Called", Debug)
Return (_SB.C000.APSS)
}
}Scope (_SB.C003)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method C003.APSS Called", Debug)
Return (_SB.C000.APSS)
}
}Scope (_SB.C004)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method C004.APSS Called", Debug)
Return (_SB.C000.APSS)
}
}Scope (_SB.C005)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method C005.APSS Called", Debug)
Return (_SB.C000.APSS)
}
}Scope (_SB.C006)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method C006.APSS Called", Debug)
Return (_SB.C000.APSS)
}
}Scope (_SB.C007)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method C007.APSS Called", Debug)
Return (_SB.C000.APSS)
}
}Scope (_SB.C008)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method C008.APSS Called", Debug)
Return (_SB.C000.APSS)
}
}Scope (_SB.C009)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method C009.APSS Called", Debug)
Return (_SB.C000.APSS)
}
}Scope (_SB.C00A)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method C00A.APSS Called", Debug)
Return (_SB.C000.APSS)
}
}Scope (_SB.C00B)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method C00B.APSS Called", Debug)
Return (_SB.C000.APSS)
}
}
}
Frequency vectors
Hi pike, i have three questions:
1- Why Ivy boards havn't frequency vectors?; how this change xcpm on ivy bridge?
2- In one old thread you advise to use -w 2 -x 0 (i've created mine with these two flags) with xcpm flag and ivy, but with xcpm should not be used -x 1?
3- Is this error related with frequency vectors? Is it fixable?
07/08/14 03:59:57,000 kernel[0]: X86PlatformPlugin::setRingTable - AICPM failed to load ring table with status 0x0: Get=0, Load=0, Install=0
07/08/14 03:59:57,000 kernel[0]: X86PlatformPlugin::configResourceHandler - Failed to set ring table!
07/08/14 03:59:57,000 kernel[0]: X86PlatformShim::start - Failed to send stepper
My config: Z77x UP5-TH, i7 3770
Is this normal on 10.6.8?
ssdtPRGen.sh v0.9 Copyright (c) 2011-2012 by † RevoGirl
v6.6 Copyright (c) 2013 by † Jeroen
v10.5 Copyright (c) 2013-2014 by Pike R. Alpha
System information: Mac OS X 10.6.8 (10K549)
Brandstring 'Intel(R) Core(TM) i5-2500 CPU @ 3.30GHz'
Scope (PR) {162 bytes} without Processor declarations ...
Scope (_PR) {164 bytes} without Processor declarations ...
Scope (SB) {108 bytes} without Processor declarations ...
Scope (SB) {86 bytes} without Processor declarations ...
Scope (_SB) {110 bytes} without Processor declarations ...
Scope (_SB) {88 bytes} without Processor declarations ...
Scope (SB) {24 bytes} without Processor declarations ...
Scope (SB) {108 bytes} without Processor declarations ...
Scope (SB) {152 bytes} without Processor declarations ...
Scope (SB) {12 bytes} without Processor declarations ...
Scope (SB) {134 bytes} without Processor declarations ...
Scope (SB) {134 bytes} without Processor declarations ...
Scope (SB) {76 bytes} without Processor declarations ...
Scope (_SB) {26 bytes} without Processor declarations ...
Scope (_SB) {110 bytes} without Processor declarations ...
Scope (_SB) {154 bytes} without Processor declarations ...
Scope (_SB) {14 bytes} without Processor declarations ...
Scope (_SB) {136 bytes} without Processor declarations ...
Scope (SB) {136 bytes} without Processor declarations ...
Scope (SB) {78 bytes} without Processor declarations ...
Generating ssdt.dsl for a iMac11,3 [Mac-F2238BAE]
Sandy Bridge Core i5-2500 processor [0x206A7] setup [0x0603]
With a maximum TDP of 95 Watt, as specified by Intel
Number logical CPU's: 4 (Core Frequency: 3300 MHz)
Number of Turbo States: 4 (3400-3700 MHz)
Number of P-States: 22 (1600-3700 MHz)
Injected C-States for P000 (C1,C3,C6,C7)
Warning: /S/L/C*/PlatformSupport.plist not found (normal for Snow Leopard)!
Error: Unknown model [iMac11,3] detected (check SMBIOS data)
Do you want to continue (y/n)? y
Warning: 'system-type' may be set improperly (1 instead of 2)
Intel ACPI Component Architecture
ASL Optimizing Compiler version 20091214 [Jun 15 2011]
Copyright (C) 2000 - 2009 Intel Corporation
Supports ACPI Specification Revision 4.0
ASL Input: /Users/Ella/Desktop/ssdt.dsl - 182 lines, 6528 bytes, 33 keywords
AML Output: /Users/Ella/Desktop/ssdt.aml - 1309 bytes, 11 named objects, 22 executable opcodes
Compilation complete. 0 Errors, 0 Warnings, 0 Remarks, 0 Optimizations
Do you want to copy /Users/Ella/Desktop/ssdt.aml to /Extra/ssdt.aml? (y/n)?n
Do you want to open ssdt.dsl (y/n)?n
bash-3.2#
CPU Type Warning (Core i3-2125)
Hello Piker, many thanks for your continuing work! I am using a Core i3-2125 on a Gigabyte GA-H61N-USB3 and running your script v12.7. If I run the script without options or with -c 0 (to force Sandy Bridge), I get a warning and eventually I am not sure if the resulting SSDT is proper for my CPU. Thanks in advance for your time, your comment is appreciated.
The Terminal debug is the following:
System information: Mac OS X 10.8.5 (12F45)
Brandstring 'Intel(R) Core(TM) i3-2125 CPU @ 3.30GHz'
Scope (PR) {26 bytes} with ACPI Processor declarations found in the DSDT (ACPI 1.0 compliant)
Generating ssdt.dsl for a 'Macmini5,1' with board-id [Mac-8ED6AF5B48C039E1]
Sandy Bridge Core i3-2125 processor [0x206A7] setup [0x0902]
With a maximum TDP of 65 Watt, as specified by Intel
Number logical CPU's: 4 (Core Frequency: 3300 MHz)
Number of Turbo States: 0
Number of P-States: 18 (1600-3300 MHz)
Injected C-States for CPU0 (C1,C3,C6)
Warning: 'cpu-type' may be set improperly (0x0902 instead of 0x0602)
AND:
Override value: (-c) CPU type, now using: Sandy Bridge!
System information: Mac OS X 10.8.5 (12F45)
Brandstring 'Intel(R) Core(TM) i3-2125 CPU @ 3.30GHz'
Scope (PR) {26 bytes} with ACPI Processor declarations found in the DSDT (ACPI 1.0 compliant)
Generating ssdt.dsl for a 'Macmini5,1' with board-id [Mac-8ED6AF5B48C039E1]
Sandy Bridge Core i3-2125 processor [0x206A7] setup [0x0902]
With a maximum TDP of 65 Watt, as specified by Intel
Number logical CPU's: 4 (Core Frequency: 3300 MHz)
Number of Turbo States: 0
Number of P-States: 18 (1600-3300 MHz)
Injected C-States for CPU0 (C1,C3,C6)
Warning: 'cpu-type' may be set improperly (0x0902 instead of 0x0602)
Mac Pro 6,1
I have errors with my 6,1 MacPro:
"MacPro6,1" doesn't match with "Mac-F60DEB81FF30ACF6" – check SMBIOS data
here is my smbios.plist:
`
Also, can you add arguments to:
- force ssdt without checking smbios
- set auto copy
- set open dsdt.dsl
Thank you!
XCPM: P-State table mismatch (error:0x12)
Using the latest script (9.6) I get these messages in the console.
2/8/14 10:42:13.000 AM kernel[0]: XCPM: registered
2/8/14 10:42:14.000 AM kernel[0]: IOPPF: XCPM mode
2/8/14 10:42:14.000 AM kernel[0]: XCPM: P-state table mismatch (error:0x12)
2/8/14 10:42:14.000 AM kernel[0]: X86PlatformShim::sendPStates - pmCPUControl (XCPMIO_SETPSTATETABLE) returned 0x12
Here is the generated ssdt.aml
/*
* Intel ACPI Component Architecture
* AML Disassembler version 20130517-64 [Jun 10 2013]
* Copyright (c) 2000 - 2013 Intel Corporation
*
* Disassembly of iASLpRc8Jy.aml, Sat Feb 8 10:45:10 2014
*
* Original Table Header:
* Signature "SSDT"
* Length 0x0000084A (2122)
* Revision 0x01
* Checksum 0x32
* OEM ID "APPLE "
* OEM Table ID "CpuPm"
* OEM Revision 0x00009600 (38400)
* Compiler ID "INTL"
* Compiler Version 0x20130117 (538116375)
*/
DefinitionBlock ("iASLpRc8Jy.aml", "SSDT", 1, "APPLE ", "CpuPm", 0x00009600)
{
External (_PR_.CPU0, DeviceObj)
External (_PR_.CPU1, DeviceObj)
External (_PR_.CPU2, DeviceObj)
External (_PR_.CPU3, DeviceObj)
External (_PR_.CPU4, DeviceObj)
External (_PR_.CPU5, DeviceObj)
External (_PR_.CPU6, DeviceObj)
External (_PR_.CPU7, DeviceObj)
Scope (\_PR.CPU0)
{
Method (_INI, 0, NotSerialized) // _INI: Initialize
{
Store ("ssdtPRGen version: 9.6 / Mac OS X 10.9.1 (13B42)", Debug)
Store ("target processor : i7-3770K", Debug)
Store ("running processor: Intel(R) Core(TM) i7-3770K CPU @ 3.50GHz", Debug)
Store ("baseFrequency : 1600", Debug)
Store ("frequency : 3500", Debug)
Store ("busFrequency : 100", Debug)
Store ("logicalCPUs : 8", Debug)
Store ("max TDP : 77", Debug)
Store ("packageLength : 24", Debug)
Store ("turboStates : 4", Debug)
Store ("maxTurboFrequency: 3900", Debug)
Store ("gIvyWorkAround : 3", Debug)
Store ("machdep.xcpm.mode: 1", Debug)
}
Name (APLF, 0x08)
Name (APSN, 0x05)
Name (APSS, Package (0x21)
{
Package (0x06)
{
0x0F3D,
0x00012CC8,
0x0A,
0x0A,
0x2800,
0x2800
},
Package (0x06)
{
0x0F3C,
0x00012CC8,
0x0A,
0x0A,
0x2700,
0x2700
},
Package (0x06)
{
0x0ED8,
0x00012CC8,
0x0A,
0x0A,
0x2600,
0x2600
},
Package (0x06)
{
0x0E74,
0x00012CC8,
0x0A,
0x0A,
0x2500,
0x2500
},
Package (0x06)
{
0x0E10,
0x00012CC8,
0x0A,
0x0A,
0x2400,
0x2400
},
Package (0x06)
{
0x0DAC,
0x00012CC8,
0x0A,
0x0A,
0x2300,
0x2300
},
Package (0x06)
{
0x0D48,
0x000120E0,
0x0A,
0x0A,
0x2200,
0x2200
},
Package (0x06)
{
0x0CE4,
0x0001152F,
0x0A,
0x0A,
0x2100,
0x2100
},
Package (0x06)
{
0x0C80,
0x000109B4,
0x0A,
0x0A,
0x2000,
0x2000
},
Package (0x06)
{
0x0C1C,
0xFE6F,
0x0A,
0x0A,
0x1F00,
0x1F00
},
Package (0x06)
{
0x0BB8,
0xF35F,
0x0A,
0x0A,
0x1E00,
0x1E00
},
Package (0x06)
{
0x0B54,
0xE884,
0x0A,
0x0A,
0x1D00,
0x1D00
},
Package (0x06)
{
0x0AF0,
0xDDDD,
0x0A,
0x0A,
0x1C00,
0x1C00
},
Package (0x06)
{
0x0A8C,
0xD36A,
0x0A,
0x0A,
0x1B00,
0x1B00
},
Package (0x06)
{
0x0A28,
0xC92B,
0x0A,
0x0A,
0x1A00,
0x1A00
},
Package (0x06)
{
0x09C4,
0xBF1F,
0x0A,
0x0A,
0x1900,
0x1900
},
Package (0x06)
{
0x0960,
0xB546,
0x0A,
0x0A,
0x1800,
0x1800
},
Package (0x06)
{
0x08FC,
0xAB9F,
0x0A,
0x0A,
0x1700,
0x1700
},
Package (0x06)
{
0x0898,
0xA229,
0x0A,
0x0A,
0x1600,
0x1600
},
Package (0x06)
{
0x0834,
0x98E6,
0x0A,
0x0A,
0x1500,
0x1500
},
Package (0x06)
{
0x07D0,
0x8FD3,
0x0A,
0x0A,
0x1400,
0x1400
},
Package (0x06)
{
0x076C,
0x86F1,
0x0A,
0x0A,
0x1300,
0x1300
},
Package (0x06)
{
0x0708,
0x7E3F,
0x0A,
0x0A,
0x1200,
0x1200
},
Package (0x06)
{
0x06A4,
0x75BD,
0x0A,
0x0A,
0x1100,
0x1100
},
Package (0x06)
{
0x0640,
0x6D6A,
0x0A,
0x0A,
0x1000,
0x1000
},
Package (0x06)
{
0x05DC,
Zero,
0x0A,
0x0A,
0x0F00,
0x0F00
},
Package (0x06)
{
0x0578,
Zero,
0x0A,
0x0A,
0x0E00,
0x0E00
},
Package (0x06)
{
0x0514,
Zero,
0x0A,
0x0A,
0x0D00,
0x0D00
},
Package (0x06)
{
0x04B0,
Zero,
0x0A,
0x0A,
0x0C00,
0x0C00
},
Package (0x06)
{
0x044C,
Zero,
0x0A,
0x0A,
0x0B00,
0x0B00
},
Package (0x06)
{
0x03E8,
Zero,
0x0A,
0x0A,
0x0A00,
0x0A00
},
Package (0x06)
{
0x0384,
Zero,
0x0A,
0x0A,
0x0900,
0x0900
},
Package (0x06)
{
0x0320,
Zero,
0x0A,
0x0A,
0x0800,
0x0800
}
})
Method (ACST, 0, NotSerialized)
{
Store ("Method CPU0.ACST Called", Debug)
Store ("CPU0 C-States : 29", Debug)
Return (Package (0x06)
{
One,
0x04,
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000000, // Address
0x01, // Access Size
)
},
One,
Zero,
0x03E8
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000010, // Address
0x03, // Access Size
)
},
0x03,
0xCD,
0x01F4
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000020, // Address
0x03, // Access Size
)
},
0x06,
0xF5,
0x015E
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000030, // Address
0x03, // Access Size
)
},
0x07,
0xF5,
0xC8
}
})
}
Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method
{
Store ("Method CPU0._DSM Called", Debug)
If (LEqual (Arg2, Zero))
{
Return (Buffer (One)
{
0x03
})
}
Return (Package (0x02)
{
"plugin-type",
One
})
}
}
Scope (\_PR.CPU1)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method CPU1.APSS Called", Debug)
Return (\_PR.CPU0.APSS)
}
Method (ACST, 0, NotSerialized)
{
Store ("Method CPU1.ACST Called", Debug)
Store ("CPU1 C-States : 7", Debug)
Return (Package (0x05)
{
One,
0x03,
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000000, // Address
0x01, // Access Size
)
},
One,
0x03E8,
0x03E8
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000010, // Address
0x03, // Access Size
)
},
0x02,
0x94,
0x01F4
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000030, // Address
0x03, // Access Size
)
},
0x03,
0xC6,
0xC8
}
})
}
}
Scope (\_PR.CPU2)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method CPU2.APSS Called", Debug)
Return (\_PR.CPU0.APSS)
}
Method (ACST, 0, NotSerialized)
{
Return (\_PR.CPU1.ACST ())
}
}
Scope (\_PR.CPU3)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method CPU3.APSS Called", Debug)
Return (\_PR.CPU0.APSS)
}
Method (ACST, 0, NotSerialized)
{
Return (\_PR.CPU1.ACST ())
}
}
Scope (\_PR.CPU4)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method CPU4.APSS Called", Debug)
Return (\_PR.CPU0.APSS)
}
Method (ACST, 0, NotSerialized)
{
Return (\_PR.CPU1.ACST ())
}
}
Scope (\_PR.CPU5)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method CPU5.APSS Called", Debug)
Return (\_PR.CPU0.APSS)
}
Method (ACST, 0, NotSerialized)
{
Return (\_PR.CPU1.ACST ())
}
}
Scope (\_PR.CPU6)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method CPU6.APSS Called", Debug)
Return (\_PR.CPU0.APSS)
}
Method (ACST, 0, NotSerialized)
{
Return (\_PR.CPU1.ACST ())
}
}
Scope (\_PR.CPU7)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method CPU7.APSS Called", Debug)
Return (\_PR.CPU0.APSS)
}
Method (ACST, 0, NotSerialized)
{
Return (\_PR.CPU1.ACST ())
}
}
}
Stuck on x8
Hi Pike, am trying to generate a working SSDT with the new version (v12.0) of the script, but it fail because am stuck on x8. Some times ago i generated my SSDT with an old version of the script (v3.6) and with that version my system is working now. Am submit you this issue/bug because i get this same behavior with the following processors:
i5-3317U
i3-2330m
WORKING SSDT CODE (i5-3317U):
/*
-
Intel ACPI Component Architecture
-
AML Disassembler version 20130725-64 [Jul 30 2013]
-
Copyright (c) 2000 - 2013 Intel Corporation
-
Disassembly of iASLfPu9zJ.aml, Sun Feb 23 12:44:25 2014
* -
Original Table Header:
-
Signature "SSDT" -
Length 0x0000046F (1135) -
Revision 0x01 -
Checksum 0x27 -
OEM ID "APPLE " -
OEM Table ID "CpuPm" -
OEM Revision 0x00003000 (12288) -
Compiler ID "INTL" -
Compiler Version 0x20121018 (538054680)*/
DefinitionBlock ("iASLfPu9zJ.aml", "SSDT", 1, "APPLE ", "CpuPm", 0x00003000)
{External (PR.CPU0, DeviceObj)
External (PR.CPU1, DeviceObj)
External (PR.CPU2, DeviceObj)
External (PR.CPU3, DeviceObj)Store ("ssdtPRGen.sh v3.6", Debug)
Store ("baseFrequency : 1200", Debug)
Store ("frequency : 1700", Debug)
Store ("logicalCPUs : 4", Debug)
Store ("tdp : 17", Debug)
Store ("packageLength : 15", Debug)
Store ("turboStates : 9", Debug)
Store ("maxTurboFrequency: 2600", Debug)
Scope (_PR.CPU0)
{
Name (APLF, 0x04)
Name (APSN, 0x0A)
Name (APSS, Package (0x14)
{
Package (0x06)
{
0x0A29,
0x4268,
0x0A,
0x0A,
0x1B00,
0x1B00
},Package (0x06) { 0x0A28, 0x4268, 0x0A, 0x0A, 0x1A00, 0x1A00 }, Package (0x06) { 0x09C4, 0x4268, 0x0A, 0x0A, 0x1900, 0x1900 }, Package (0x06) { 0x0960, 0x4268, 0x0A, 0x0A, 0x1800, 0x1800 }, Package (0x06) { 0x08FC, 0x4268, 0x0A, 0x0A, 0x1700, 0x1700 }, Package (0x06) { 0x0898, 0x4268, 0x0A, 0x0A, 0x1600, 0x1600 }, Package (0x06) { 0x0834, 0x4268, 0x0A, 0x0A, 0x1500, 0x1500 }, Package (0x06) { 0x07D0, 0x4268, 0x0A, 0x0A, 0x1400, 0x1400 }, Package (0x06) { 0x076C, 0x4268, 0x0A, 0x0A, 0x1300, 0x1300 }, Package (0x06) { 0x0708, 0x4268, 0x0A, 0x0A, 0x1200, 0x1200 }, Package (0x06) { 0x06A4, 0x4268, 0x0A, 0x0A, 0x1100, 0x1100 }, Package (0x06) { 0x0640, 0x3DCA, 0x0A, 0x0A, 0x1000, 0x1000 }, Package (0x06) { 0x05DC, 0x3944, 0x0A, 0x0A, 0x0F00, 0x0F00 }, Package (0x06) { 0x0578, 0x34D6, 0x0A, 0x0A, 0x0E00, 0x0E00 }, Package (0x06) { 0x0514, 0x307F, 0x0A, 0x0A, 0x0D00, 0x0D00 }, Package (0x06) { 0x04B0, 0x2C3F, 0x0A, 0x0A, 0x0C00, 0x0C00 }, Package (0x06) { 0x044C, Zero, 0x0A, 0x0A, 0x0B00, 0x0B00 }, Package (0x06) { 0x03E8, Zero, 0x0A, 0x0A, 0x0A00, 0x0A00 }, Package (0x06) { 0x0384, Zero, 0x0A, 0x0A, 0x0900, 0x0900 }, Package (0x06) { 0x0320, Zero, 0x0A, 0x0A, 0x0800, 0x0800 } }) Method (ACST, 0, NotSerialized) { Store ("CPU0 C-States : 29", Debug) Return (Package (0x06) { One, 0x04, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000000, // Address 0x01, // Access Size ) }, One, Zero, 0x03E8 }, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000010, // Address 0x03, // Access Size ) }, 0x03, 0xCD, 0x01F4 }, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000020, // Address 0x03, // Access Size ) }, 0x06, 0xF5, 0x015E }, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000030, // Address 0x03, // Access Size ) }, 0x07, 0xF5, 0xC8 } }) } Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { If (LEqual (Arg2, Zero)) { Return (Buffer (One) { 0x03 }) } Return (Package (0x02) { "plugin-type", One }) }}
Scope (_PR.CPU1)
{
Method (APSS, 0, NotSerialized)
{
Return (_PR.CPU0.APSS)
}Method (ACST, 0, NotSerialized) { Store ("CPU1 C-States : 7", Debug) Return (Package (0x05) { One, 0x03, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000000, // Address 0x01, // Access Size ) }, One, 0x03E8, 0x03E8 }, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000010, // Address 0x03, // Access Size ) }, 0x02, 0x94, 0x01F4 }, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000030, // Address 0x03, // Access Size ) }, 0x03, 0xC6, 0xC8 } }) }}
Scope (_PR.CPU2)
{
Method (APSS, 0, NotSerialized)
{
Return (_PR.CPU0.APSS)
}Method (ACST, 0, NotSerialized) { Return (\_PR.CPU1.ACST ()) }}
Scope (_PR.CPU3)
{
Method (APSS, 0, NotSerialized)
{
Return (_PR.CPU0.APSS)
}Method (ACST, 0, NotSerialized) { Return (\_PR.CPU1.ACST ()) }}
}
DON'T WORKING SSDT CODE (i5-3317U):
/*
-
Intel ACPI Component Architecture
-
AML Disassembler version 20130725-64 [Jul 30 2013]
-
Copyright (c) 2000 - 2013 Intel Corporation
-
Disassembly of iASLZihFeu.aml, Sun Feb 23 12:47:05 2014
* -
Original Table Header:
-
Signature "SSDT" -
Length 0x000005BC (1468) -
Revision 0x01 -
Checksum 0x28 -
OEM ID "APPLE " -
OEM Table ID "CpuPm" -
OEM Revision 0x00012000 (73728) -
Compiler ID "INTL" -
Compiler Version 0x20130117 (538116375)*/
DefinitionBlock ("iASLZihFeu.aml", "SSDT", 1, "APPLE ", "CpuPm", 0x00012000)
{External (PR.CPU0, DeviceObj)
External (PR.CPU1, DeviceObj)
External (PR.CPU2, DeviceObj)
External (PR.CPU3, DeviceObj)Scope (_PR.CPU0)
{
Method (_INI, 0, NotSerialized) // _INI: Initialize
{
Store ("ssdtPRGen version....: 12.0 / Mac OS X 10.9.1 (13B42)", Debug)
Store ("target processor.....: i5-3317U", Debug)
Store ("running processor....: Intel(R) Core(TM) i5-3317U CPU @ 1.70GHz", Debug)
Store ("baseFrequency........: 1200", Debug)
Store ("frequency............: 1700", Debug)
Store ("busFrequency.........: 100", Debug)
Store ("logicalCPUs..........: 4", Debug)
Store ("maximum TDP..........: 17", Debug)
Store ("packageLength........: 15", Debug)
Store ("turboStates..........: 9", Debug)
Store ("maxTurboFrequency....: 2600", Debug)
Store ("machdep.xcpm.mode....: 0", Debug)
}Name (APLF, Zero) Name (APSN, 0x09) Name (APSS, Package (0x0F) { Package (0x06) { 0x0A28, 0x4268, 0x0A, 0x0A, 0x1A00, 0x1A00 }, Package (0x06) { 0x09C4, 0x4268, 0x0A, 0x0A, 0x1900, 0x1900 }, Package (0x06) { 0x0960, 0x4268, 0x0A, 0x0A, 0x1800, 0x1800 }, Package (0x06) { 0x08FC, 0x4268, 0x0A, 0x0A, 0x1700, 0x1700 }, Package (0x06) { 0x0898, 0x4268, 0x0A, 0x0A, 0x1600, 0x1600 }, Package (0x06) { 0x0834, 0x4268, 0x0A, 0x0A, 0x1500, 0x1500 }, Package (0x06) { 0x07D0, 0x4268, 0x0A, 0x0A, 0x1400, 0x1400 }, Package (0x06) { 0x076C, 0x4268, 0x0A, 0x0A, 0x1300, 0x1300 }, Package (0x06) { 0x0708, 0x4268, 0x0A, 0x0A, 0x1200, 0x1200 }, Package (0x06) { 0x06A4, 0x4268, 0x0A, 0x0A, 0x1100, 0x1100 }, Package (0x06) { 0x0640, 0x3DCA, 0x0A, 0x0A, 0x1000, 0x1000 }, Package (0x06) { 0x05DC, 0x3944, 0x0A, 0x0A, 0x0F00, 0x0F00 }, Package (0x06) { 0x0578, 0x34D6, 0x0A, 0x0A, 0x0E00, 0x0E00 }, Package (0x06) { 0x0514, 0x307F, 0x0A, 0x0A, 0x0D00, 0x0D00 }, Package (0x06) { 0x04B0, 0x2C3F, 0x0A, 0x0A, 0x0C00, 0x0C00 } }) Method (ACST, 0, NotSerialized) { Store ("Method CPU0.ACST Called", Debug) Store ("CPU0 C-States : 29", Debug) Return (Package (0x06) { One, 0x04, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000000, // Address 0x01, // Access Size ) }, One, Zero, 0x03E8 }, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000010, // Address 0x03, // Access Size ) }, 0x03, 0xCD, 0x01F4 }, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000020, // Address 0x03, // Access Size ) }, 0x06, 0xF5, 0x015E }, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000030, // Address 0x03, // Access Size ) }, 0x07, 0xF5, 0xC8 } }) } Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { Store ("Method CPU0._DSM Called", Debug) If (LEqual (Arg2, Zero)) { Return (Buffer (One) { 0x03 }) } Return (Package (0x02) { "plugin-type", One }) }}
Scope (_PR.CPU1)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method PR.CPU1.APSS Called", Debug)
Return (_PR.CPU0.APSS)
}Method (ACST, 0, NotSerialized) { Store ("Method CPU1.ACST Called", Debug) Store ("CPU1 C-States : 7", Debug) Return (Package (0x05) { One, 0x03, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000000, // Address 0x01, // Access Size ) }, One, 0x03E8, 0x03E8 }, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000010, // Address 0x03, // Access Size ) }, 0x02, 0x94, 0x01F4 }, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000030, // Address 0x03, // Access Size ) }, 0x03, 0xC6, 0xC8 } }) }}
Scope (_PR.CPU2)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method PR.CPU2.APSS Called", Debug)
Return (_PR.CPU0.APSS)
}Method (ACST, 0, NotSerialized) { Return (\_PR.CPU1.ACST ()) }}
Scope (_PR.CPU3)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method PR.CPU3.APSS Called", Debug)
Return (_PR.CPU0.APSS)
}Method (ACST, 0, NotSerialized) { Return (\_PR.CPU1.ACST ()) }}
}
TSC unsyncronized, no speedstep sandy bridge
Hey Piker-Alpha. First thanks for make script to generate SSDT, its very useful! :) Second, why i don't have speed step with my i3-2130? the script say cpu type 0x603 instead of 0x903? MSRDumper show I only have PStates 16-34, cpu package have a speed step(on hwmonitor) but no speed step on cpu multiplier. Third, why TSC is unsyncronized? I don't know about TSC, i'am a newbies for CPU program, I don't know anything. Thanks, i hope you can reply my issue :)
Ambiguity with Processor label length in help (version 13,1)
It is not a functional bug, more a cosmetic one.
-a (acpi) processor label is tested for the the first 3 letters (beginning of name), CPU or C00 but the online help make reference to the complete (4 letters) name CPU0 or C000.
I you follow strictly the help and use -a C000 you got a length error...
However using -a C00 works OK as you specify only the root name and the numbering is done by the script depending on the number of logical cpus, but it could be confusing at first, which is precisely what an online help should be preventing. :)
I think you should modify the online help to clearly state:
-acpi First 3 letters of Processor name (example: CPU, C00)
i7-3520M : Clock Stuck @ 780MHz
well I used ur script w/ many flags and all of them return to an SSDT that get my cpu stuck at 700/800MHz (lower than the lowest possible freq!) and therefore OS X run SLOW!
Only one flag (-w 3) worked a bit fine but give me Turbo Mode freqs only, therefore more energy and HIGH TEMPs!
Using the SSDTs from my BIOS wont work @ all.
I'm stuck @ 2 freqs now (1,2GHz and 2,9GHz the min and the max designed for my CPU).
What can it be?
the Log: http://pastebin.com/tasDtS9n
Edit 1:
I tried many flags (all of them at once in fact) to precise give my CPU's description, but I only get 4 states : 12 20 24 29 (and then the Turbo modes (30 31 32 33 34) all of them, and that keeps my laptop ultra hot!)
Using Clover BTW
How could i make the turbo boost work?
I have a i5-4200U processor, which works now perfectly with the SSDT generated by your script.
Great work! Thanks!
but i found that the frequent stays maximal at 2.3GHz, but with turbo boost it could reach 2.6GHz actually.
Is it possible to make the turbo boost work?
Thanks in advance.
Core i7-3770 build fails
I'm getting an error:
ACPI Processor {} Declaration(s) found in DSDT
sed: 1: "s/^[\n]*
Warning
Usin ...": unterminated substitute pattern
Warning
Using assumed Scope (_PR) {}:
full debug log (-d 2) http://pastebin.com/raw.php?i=TQ1him5d
the build failure leads to an error in the kernel log:
IOPPF: XCPM mode
XCPM: P-state table mismatch (error:0x13)
X86PlatformShim::sendPStates - pmCPUControl (XCPMIO_SETPSTATETABLE) returned 0x13
X86PlatformShim::start - Failed to send PStates
X86PlatformShim::start - Failed to send stepper
CPU x2 E5-2640
Hello Pike
I would like to ask you if the command to create the SSDT is right for these CPUs x2 E5-2640 : ~/ssdtPRGen.sh -c 2 -p E5-2640
Thank you
Wrong base frequency on 3517U
Hey friend, I wonder if you can help me... Your script helped me a lot for now I have CPUPM correctly working on my notebook, but, The script is generating a SSDT where it keeps the frequency of my processor at 1.2ghz on IDLE, but it should be 800mhz... I used clover before to generate the states and it could successfully set the 800mhz state for me, with the script I cant, see the generated states:
Name (APLF, 0x04) Name (APSN, 0x0C) Name (APSS, Package (0x18) { /* Workaround for the Ivy Bridge PM 'bug' */ Package (0x06) { 0x0BB9, 0x004268, 0x0A, 0x0A, 0x1F00, 0x1F00 }, /* High Frequency Modes (turbo) */ Package (0x06) { 0x0BB8, 0x004268, 0x0A, 0x0A, 0x1E00, 0x1E00 }, Package (0x06) { 0x0B54, 0x004268, 0x0A, 0x0A, 0x1D00, 0x1D00 }, Package (0x06) { 0x0AF0, 0x004268, 0x0A, 0x0A, 0x1C00, 0x1C00 }, Package (0x06) { 0x0A8C, 0x004268, 0x0A, 0x0A, 0x1B00, 0x1B00 }, Package (0x06) { 0x0A28, 0x004268, 0x0A, 0x0A, 0x1A00, 0x1A00 }, Package (0x06) { 0x09C4, 0x004268, 0x0A, 0x0A, 0x1900, 0x1900 }, Package (0x06) { 0x0960, 0x004268, 0x0A, 0x0A, 0x1800, 0x1800 }, Package (0x06) { 0x08FC, 0x004268, 0x0A, 0x0A, 0x1700, 0x1700 }, Package (0x06) { 0x0898, 0x004268, 0x0A, 0x0A, 0x1600, 0x1600 }, Package (0x06) { 0x0834, 0x004268, 0x0A, 0x0A, 0x1500, 0x1500 }, Package (0x06) { 0x07D0, 0x004268, 0x0A, 0x0A, 0x1400, 0x1400 }, /* High Frequency Modes (non-turbo) */ Package (0x06) { 0x076C, 0x004268, 0x0A, 0x0A, 0x1300, 0x1300 }, Package (0x06) { 0x0708, 0x003E32, 0x0A, 0x0A, 0x1200, 0x1200 }, Package (0x06) { 0x06A4, 0x003A12, 0x0A, 0x0A, 0x1100, 0x1100 }, Package (0x06) { 0x0640, 0x003607, 0x0A, 0x0A, 0x1000, 0x1000 }, Package (0x06) { 0x05DC, 0x003211, 0x0A, 0x0A, 0x0F00, 0x0F00 }, Package (0x06) { 0x0578, 0x002E30, 0x0A, 0x0A, 0x0E00, 0x0E00 }, Package (0x06) { 0x0514, 0x002A64, 0x0A, 0x0A, 0x0D00, 0x0D00 }, /* Low Frequency Mode */ Package (0x06) { 0x04B0, 0x0026AB, 0x0A, 0x0A, 0x0C00, 0x0C00 }, Package (0x06) { 0x044C, Zero, 0x0A, 0x0A, 0x0B00, 0x0B00 }, Package (0x06) { 0x03E8, Zero, 0x0A, 0x0A, 0x0A00, 0x0A00 }, Package (0x06) { 0x0384, Zero, 0x0A, 0x0A, 0x0900, 0x0900 }, Package (0x06) { 0x0320, Zero, 0x0A, 0x0A, 0x0800, 0x0800 } })
the problem lies in the last four states not being reached, what is not a surprise 'cause aplf is set to 0x04, whenever I try to fix the states by myself, setting the base frequency on the .sh script from 0 to 800 it generates the states correctly and with aplf 0 but when I try to boot i get:
P-state Stepper error 18 at step 29
i5-4440S
Could you please add support for this Haswell CPU?
Different behavior with different Chamaleon version
Hi Pike, maybe it is not related, but with different version of Chamaleon (r2283 ) boot loader I have a warning like this (with r2359 no warning):
ssdtPRGen.sh v0.9 Copyright (c) 2011-2012 by † RevoGirl
v6.6 Copyright (c) 2013 by † Jeroen
v11.0 Copyright (c) 2013-2014 by Pike R. Alpha
Bugs > https://github.com/Piker-Alpha/ssdtPRGen.sh/issues <
System information: Mac OS X 10.9.2 (13C62)
Brandstring 'Intel(R) Xeon(R) CPU E5-2690 v2 @ 3.00GHz'
matchingData: 5b824d9553434b30085f4849440d414350493030303400
5b824d9553434b31085f4849440d414350493030303400
5b824b9953434b32085f4849440d414350493030303400
5b824b9953434b33085f4849440d414350493030303400\n
Generating ssdt.dsl for a 'MacPro6,1' with board-id [Mac-F60DEB81FF30ACF6]
Ivy Bridge Core E5-2690 v2 processor [0x306E4] setup [0x0501]
With a maximum TDP of 130 Watt, as specified by Intel
Number logical CPU's: 20 (Core Frequency: 3000 MHz)
Number of Turbo States: 6 (3100-3600 MHz)
Number of P-States: 25 (1200-3600 MHz)
Injected C-States for C000 (C1,C3,C6)
Injected C-States for C001 (C1,C3,C6)
Warning: 'cpu-type' may be set improperly (0x0501 instead of 0x0a01)
Intel ACPI Component Architecture
ASL Optimizing Compiler version 20130117-64 [Jan 19 2013]
Copyright (c) 2000 - 2013 Intel Corporation
ASL Input: /Users/fabio/Desktop/ssdt.dsl - 467 lines, 13208 bytes, 144 keywords
AML Output: /Users/fabio/Desktop/ssdt.aml - 3364 bytes, 64 named objects, 80 executable opcodes
Compilation complete. 0 Errors, 0 Warnings, 0 Remarks, 0 Optimizations
Core i7-3770K cannot get SpeedStep/PM on 10.8.5 or 10.9.2 (latest scripts)
Hello PikeRAlpha, many thanks for your continuing work on this script! I am using a Core i7-3700K on a Gigabyte GA-Z77N-WIFI not over-clocked but setup normally.
When I started experimenting with your script v9.1, the resulting SSDT seems to have worked on both 10.8.5 and 10.9.2 I think. But since script v12.x and until today v13.5 the normal script produces SSDT that freezes the clock at 800MHz whilst the reading is supposed to start at 1600MHz. Normal top speed is 3500MHz and turbo goes to 3900MHz.
a) Running the hackintosh without PEGP discrete graphics card, did this affect the results/output? Original SSDT generation via your script was with a borrowed NVIDIA card…
b) I read in another reply you wrote that Apple changed something and we must test -w 2 if -w 3 doesn't work as older scripts added top/bottom entries. But in my case for the Core i7-3770K it's the other way around :-) (#29) Should I still try the -xcpm flag in /Library/Preferences/SystemConfiguration/com.apple.Boot.plist ?
c) Comparing the resulting DSL files, and examining them, I see the "workaround" that adds 3901MHz (0x0F3D) entry on the top of the APSS entry:
/* Workaround for the Ivy Bridge PM 'bug' */
Package (0x06) { 0x0F3D, 0x012CC8, 0x0A, 0x0A, 0x2800, 0x2800 },
/* High Frequency Modes (turbo) */
Package (0x06) { 0x0F3C, 0x012CC8, 0x0A, 0x0A, 0x2700, 0x2700 },
I have no idea what this does, but it seems that it's needed. However, there are more entries entered BELOW the 1600MHz barrier, namely:
/* Low Frequency Mode */
Package (0x06) { 0x0640, 0x006D6A, 0x0A, 0x0A, 0x1000, 0x1000 },
Package (0x06) { 0x05DC, Zero, 0x0A, 0x0A, 0x0F00, 0x0F00 },
Package (0x06) { 0x0578, Zero, 0x0A, 0x0A, 0x0E00, 0x0E00 },
Package (0x06) { 0x0514, Zero, 0x0A, 0x0A, 0x0D00, 0x0D00 },
Package (0x06) { 0x04B0, Zero, 0x0A, 0x0A, 0x0C00, 0x0C00 },
Package (0x06) { 0x044C, Zero, 0x0A, 0x0A, 0x0B00, 0x0B00 },
Package (0x06) { 0x03E8, Zero, 0x0A, 0x0A, 0x0A00, 0x0A00 },
Package (0x06) { 0x0384, Zero, 0x0A, 0x0A, 0x0900, 0x0900 },
Package (0x06) { 0x0320, Zero, 0x0A, 0x0A, 0x0800, 0x0800 }
…which I suspect has to do with the IGPU, right? The official lowest CPU frequency is supposed to be 1600MHz but if these bottom APSS part(s) are missing, the Desktop boots at 800MHz clock, making the computer too slow :-)
I am attaching here all 3 files for your text-comparison:
a) generation without any parameters
b) generation with -w 2 parameter
c) generation with -w 3 parameter (which enables SpeedStepping whilst using HD4000)
Your comment please? If I plug back a discrete graphics card, would I make this work without the -w 3 or -w 2 option, you think?
Many thanks in advance for your time and kind help. Please let me know if you need scripts outputs?
P.S. Files cannot be uploaded, instead packing them in a separate web-folder:
http://fzr3lbkikh.1fichier.com/
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D3
Data-Driven Documents codes.
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Tencent
China tencent open source team.