Comments (4)
The entire address channel is registered only if obi_req_o is not immediately granted by obi_gnt_i.
A burst of granted request will go through it in transparent mode to avoid to add any latency and don't need to be registered.
As soon as obi_gnt_i is 0 when obi_req_o =1 then the entire channel is memorized to have stable information on obi side as long as obi_gnt_i is not 1.
And no new request is accepted from trans side.
from cv32e40p.
Hi,
The "unstable" transaction at time 380.000 is retracted while trans_ready_o is 0 which means the design is still managing previous one.
FSM state is always switching between TRANSPARENT and REGISTERED states. It does not stay continuously in REGISTERED state and take any new transaction to register it if obi_gnt_i is 0.
This is the responsibility of the transaction generator to use/check trans_ready_o to figure out if the transaction has been taken into account by the design.
from cv32e40p.
As the design is working as expected I close this issue.
from cv32e40p.
Ok, I think I am fundamentally off as to the intended function of this module. I thought it was that if ever trans_valid_o was asserted, the entire address channel would be registered and ensure it eventually arrives on obi. But I'm thinking by your reply this is not correct.
Can you give me a short description of this modules function? Thanks.
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