Help needed: Integration of cvFPU with cv32e40p and adding a custom instruction about cv32e40p HOT 5 CLOSED

@diggi0330 Why did you tag me? (I'm wondering if it's because I wrote a guide to adding custom instructions to RI5CY years ago - if so, I haven't kept that up to date with the OpenHWGroup cores like cv32e40p etc., so I'm concerned you might be following outdated info if so)

from cv32e40p.

Hi @diggi0330, thanks for your interest in OpenHW! Note that none of the individuals you "at mentioned" are currently involved in the CV32E40P. The current version of this core has explicit support for the floating point unit which you can control via top-level parameters at compile/synthesis time. Check out the Core Integration chapter of the user Manual for details about how that is done.

We no longer explicitly support Verilator with any of our scriptware. Having said that, there should be no reason why the CV32E40P cannot be compiled and simulated with an up to date version of Verilator. Have a look at the core testbench in CORE-V-VERIF for a good starting point. Note that we do not maintain that testbench, so it will be rather out of date. A pull-request to update it would be welcome!

If you are interested in adding custom instructions to a RISC-V core, have a look at the CV32E40X.

from cv32e40p.

Hi @MikeOpenHWGroup and others, sorry for bugging you earlier and tagging you unknowingly. Also, thank you for your prompt reply to my questions.

A quick update: I was able to extend the GNU assembler to support both R4-type and R-type custom instruction extensions. I used a reserved OPCODE to get the required functionality.

The current version of this core has explicit support for the floating point unit which you can control via top-level parameters at compile/synthesis time. Check out the Core Integration chapter of the user Manual for details about how that is done.

According to my understanding of the code, this is the case where we use APU with FPU = 1 and ZFINX = 1. This performs the required fp-operations however, the latency is huge since it does not use cvFPU. (Please correct me if I am wrong about this). I already verified this with the verilator and got the correct result.

However, I am still stuck on including FPU support with the cv32e40p core. Please guide me on how to compile the cv32e40pV2 with uvm support. I can't locate the cv32e40pV2 Github repository.

from cv32e40p.

Hi @diggi0330 there is only one CV32E40P repo. You determine which version you compile/synthesize using the top-level instanitation parameters. I strongly recommend reading the User Manual (not the code!) to learn how this is done. Pay particular attention to the Core Integration and Core Versions chapters.

from cv32e40p.

Thanks for the help. I’ll try to go through the user manual.

from cv32e40p.