I found a mistake I think about time-appliance-project HOT 4 OPEN

The marked up schematic page 1, to reflect the assembly:

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Q1: Your observation is in general correct. The schematics you are reffering does not match with the FPGA readme. The schematics is a beta (should we replace this once? @ahmadexp) and it was wrong because with this you loose the backwards compatibility. Do you have produced your own PCB?
On the picture you can see that it was patched on the hardware.

So in short the FPGA/Readme.pdf is correct.

2. In the u-center I am using 9th generation is supported (Version 20.06.01)

Q2: I don't understand what you exactly mean by this?

Q3: I guess so but as mentioned I don't see there any problem with U-Center

The FPGA comes up with a base configuration, however without PCIe or UART you can't do any modification or reading out any time (I guess the schematics you are reffering to doesn't have an FPGA UART). I would recommand to continue with the PCIe and the driver.

from time-appliance-project.

from time-appliance-project.

Q2: Theoretically you should see a PPS even without a GNSS module. By default on ANT4 the PPS of the Local Clock from the PPS master is selected.
Additionally you can maybe check some status on the LEDs. On LED3 you should get also a PPS. They have following mapping (Readme.pdf is updated with this information):
LED1: Alive LED of the FPGA internal Clock (50MHz) --> This must be blinking!
LED2: Alive LED of the PCIe clocking part (62.5MHz)
LED3: PPS of the FPGA (Time of the Local Clock via PPS Master)
LED4: PPS of the MAC (differential inputs from the MAC via diff-buffer)

from time-appliance-project.