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lm-riscv-dv

An Open-Source Design and Verification Environment for RISC-V

logic

CMake, SystemVerilog and SystemC utilities for creating, building and testing RTL projects for FPGAs and ASICs.

lowrisc-chip

The root repo for lowRISC project and FPGA demos.

miaow

An open source GPU based off of the AMD Southern Islands ISA.

mipi-csi-2

Capture images/video from a Raspberry Pi Camera (MIPI CSI-2) with an FPGA

mit6.s081

mpsoc-dma

Direct Access Memory for MPSoC

mpsoc-dv

MPSoC verified with UVM/OSVVM/FV

mpsoc-gpio

General Purpose Input Output for MPSoC

mpsoc-msp430

MPSoC with MSP430-16

mpsoc-noc

Network on Chip for MPSoC

mpsoc-riscv

MPSoC with RISCV-32 / RISCV-64 / RISCV-128

mpsoc-uart

Universal Asynchronous Receiver-Transmitter for MPSoC

my_vimrc

:dragon_face:Jude's vimrc for DV work(fine tuning for SV/UVM)

neorv32

:desktop_computer: A tiny, customizable and highly extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.

nontrivial-mips

NonTrivial-MIPS is a synthesizable superscalar MIPS processor with branch prediction and FPU support, and it is capable of booting linux.

nutshell

RISC-V SoC designed by students in UCAS

nyuziprocessor

GPGPU microprocessor architecture

open-isa.org

Software, tools, documentation for Vegaboard platform

open-nic

AMD OpenNIC Project Overview

open-register-design-tool

Tool to generate register RTL, models, and docs using SystemRDL or JSpec input

openc906

OpenXuantie - OpenC906 Core

openc910

OpenXuantie - OpenC910 Core

opene902

OpenXuantie - OpenE902 Core

opene906

OpenXuantie - OpenE906 Core

openhmc

openHMC - an open source Hybrid Memory Cube Controller

openip

Open source IP collection

opentitan

OpenTitan: Open source silicon root of trust

opentitan_soc

openwifi-hw

open-source IEEE 802.11 WiFi baseband FPGA (chip) design: FPGA, hardware