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8051

8051 core

ahb-to-apb-bridge-verification

Maven Silicon project - AHB-to-APB Bridge Verification using UVM Methodology.

ahb2

AMBA AHB 2.0 VIP in SystemVerilog UVM

ahb2apb_bridge_vip

AHB to APB Bridge VIP

alice5

SPIR-V fragment shader GPU core based on RISC-V

amba3-vip

amba3 apb/axi vip

amba_apb_sram

AMBA v.3 APB v.1 Specification Complaint Slave SRAM Core design and testbench. The testbench is developed using System Verilog and UVM and can be used as standalone Verification IP (VIP).

amba_axi_ahb_apb

AMBA bus lecture material

amiq_apb

SystemVerilog VIP for AMBA APB protocol

amiq_blog

Code snippets from articles published on www.amiq.com/consulting/blog

amiq_i2c

Verification Component for I2C protocol

amiq_reg_agt

Register Agent

amy_mcu

A MCU implementation based PODES-M0O

ao486

The ao486 is an x86 compatible Verilog core implementing all features of a 486 SX.

apb-spi-controller-verification

UVM testbench environment consisting of an APB driver, high level SPI controller model, and SPI verification testbench based upon an LPC24xx microcontroller specification.

apb-uart-uvm-env

apb3_slave_vip

apb_avip

ABP Accelerated VIP

apb_cache_ctrl

APB cache controller for private caches of the RISCY core

apb_i2c

apb_interrupt_cntrl

Small and simple APB interrupt controller

apb_spi_master

apb_vip

Verification IP for APB protocol

apb_vip-1

APB VIP (UVM)

apb_vip-2

This apb vip is designed for APB2, APB3, APB4 protocols

apb_vip_repo

apbi2c

APB to I2C

ariane

Ariane is a 6-stage RISC-V CPU

arm7

Implemetation of pipelined ARM7TDMI processor in Verilog

arm_amba_design

Based on ARM AMBA bus protocol, Verilog is used to design the digital circuit.