dominiksalvet Goto Github PK
Name: Dominik Salvet
Type: User
Dominik Salvet's Projects
afc-gui
GUI for the asus-fan-control project
afc-scout
ACPI scout of asus-fan-control
asus-fan-control
Fan control for ASUS devices running Linux
asus-zenbook-ux430ua-linux-setup
Set up ASUS ZenBook UX430UA to work correctly with Linux.
bachelor-thesis
Bachelor thesis about designing a 64-bit pipelined processor
biriscv
32-bit Superscalar RISC-V CPU
biriscv-env
biRISC-V - 32-bit dual issue RISC-V CPU Software Environment
cores-veer-eh1
VeeR EH1 core
cpurast
Software-based rasterization library
crypto-addr-extract
Extract cryptocurrency addresses from big datasets
cva5
The CORE-V CVA5 is an Application class 5-stage RISC-V CPU specifically targetting FPGA implementations.
gim
Simple installation manager for your Git projects.
gitpack
Git-based package manager written in POSIX shell
high-school-thesis
High school thesis about designing a 16-bit processor
huffman-codec
Adaptive Huffman coding with extra features
limen
16-bit RISC processor with von Neumann architecture
limen-alpha
Dual-core 16-bit RISC processor
nconv
Number converter with two's complement and arbitrary precision
pathfinding-robots
Simple robot game demonstrating pathfinding
pcycle
My first processor written in HDL language
risc63
Custom 64-bit pipelined RISC processor
scr1
SCR1 is a high-quality open-source RISC-V MCU core in Verilog
six-alpha
Accumulator-based 4-bit processor
template
Template for repositories with GitHub features
the-hardisc
Hardened RISC-V core
tine-alpha
8-bit MISC processor with pipelining
uvod_do_vhdl
Stručný úvod do VHDL od úplného začátku
ux430ua-jack-volume
Fix low volume of ASUS ZenBook UX430UA running Linux
vhdl-collection
Collection of generic VHDL modules
vhdldep
Generate VHDL dependencies in a Makefile format
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