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nrf24l01-spin's Introduction

nrf24l01-spin

This is a P8X32A/Propeller, P2X8C4M64P/Propeller 2 driver object for the Nordic Semiconductor nRF24L01+ IC.

IMPORTANT: This software is meant to be used with the spin-standard-library (P8X32A) or p2-spin-standard-library (P2X8C4M64P). Please install the applicable library first before attempting to use this code, otherwise you will be missing several files required to build the project.

Salient Features

  • SPI connection at 4MHz (P1), up to 10MHz (P2)
  • Supports setting carrier frequency from 2,400MHz to 2,525MHz, or by equiv. channel number
  • Set common RF parameters: TX power
  • Supports on-air baud rates of 250kbps, 1000kbps, 2000kbps
  • Address filtering: 3, 4, 5 bytes address width (for pipes 0, 1 only; pipes 2..5: only the LSByte is changeable)
  • Options for increasing transmission robustness: CRC calculation/checking (1 or 2 byte length)
  • Packet radio options: arbitrary payload lengths (1..32), dynamic payload length
  • Carrier-detect
  • FIFO: Read RX/TX states (empty, full, data ready, data sent), flush
  • Optional auto acknowledgement function (aka Enhanced ShockBurst (TM) NORDIC Semiconductor), auto-retransmit count, auto-retransmit delay, max number of retries
  • Selectively enable pipes (0..5), with some settings changeable on a per-pipe basis (payload length, address, address width)
  • Interrupts based on any combination of: New RX data ready, data transmitted, max number of retransmits reached (driver doesn't directly support the IRQ pin - only reading/clearing the interrupt state register)
  • Packet stats: Lost packet count, retransmitted packet count
  • Power on/off
  • RF Testing modes: Force PLL lock, CW mode

Requirements

P1/SPIN1:

  • spin-standard-library
  • P1: 1 additional core/cog, for the PASM SPI engine

P2/SPIN2:

  • p2-spin-standard-library

Compiler Compatibility

Processor Language Compiler Backend Status
P1 SPIN1 FlexSpin (6.8.0) Bytecode OK
P1 SPIN1 FlexSpin (6.8.0) Native/PASM OK
P2 SPIN2 FlexSpin (6.8.0) NuCode Build OK (untested)
P2 SPIN2 FlexSpin (6.8.0) Native/PASM2 OK

(other versions or toolchains not listed are not supported, and may or may not work)

Limitations

  • P2/SPIN2: MOSI and MISO I/O pins must be within 3 pins of SCK
  • API not yet stable
  • RSSI method is only an alias for RPD(), which returns a receive power detect/carrier-detect flag. For wireless.transceiver API compatibility only

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nrf24l01-spin's Issues

Add support for TX queuing/deferred writes

Currently it's only possible to immediately transmit a payload with tx_payld()
Support should be added for queuing the data and transmitting at a later time based on some user setting (e.g., the FIFO is full, or an explicit 'transmit now' flag)

Make PayloadLen() standards-compliant

PayloadLen() currently takes two parameters, pipe number and length. To operate with the same API as other wireless drivers, it should only have a length parameter. Separate pipe number choice out to a different method and store in hub var? Could possibly be used for other methods that are pipe number-centric, too.

Pipe addresses function like syncwords

Although referred to as addresses, the pipe addresses set by RXAddr() and TXAddr() function like syncwords (and are indeed transmitted at the same point in time a syncword would be by other transceivers, when looking at the OTA packet format).
See if aliasing to SyncWord() methods is feasible/practical.

Add interrupt demo

Current demos poll the various status methods to determine program flow. Demonstrate how to use the IRQ pin on the nRF24 as an alternate means.

Add FHSS demo

The datasheet briefly mentions or implies that the chip can change channels fast enough to do spread-spectrum. Test this out and write a demo for it.

Add DPL-related demos

All TX/RX demos currently assume a fixed packet length. Add demonstration of the dynamic payload length capability.

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