- ๐ Hi, Iโm @zli87
- ๐ Iโm interested in ASIC Design Verification of computer arhictecture
- ๐ฑ I plan to learn UVM verification, ASIC accelerator, high level synthesis
- ๐๏ธ Iโm looking to collaborate on RTL design/verification
- ๐ซ How to reach me: [email protected]
zli87 / openmpw_mytest Goto Github PK
View Code? Open in Web Editor NEWmy testing project
License: Apache License 2.0