zhangxinqian / computer-architecture-project02 Goto Github PK
View Code? Open in Web Editor NEWA MIPS simulator for a pipeline processor with basic Scoreboard algorithm
A MIPS simulator for a pipeline processor with basic Scoreboard algorithm
学长好,今年修了计算机体系结构这门课,在project2时遇到了一些困难,然后就搜到了你的代码,研读了你的代码之后,收获很多,但是有一个关键的地方还是不大理解,希望学长能够解答一下。
在代码390-402这一段,是使用了标志位来标志每个寄存器当前的读写情况,
self.__reg_r = [
4, 4, 4, 4, 4, 4, 4, 4,
4, 4, 4, 4, 4, 4, 4, 4,
4, 4, 4, 4, 4, 4, 4, 4,
4, 4, 4, 4, 4, 4, 4, 4
]
但是为什么要用4呢(我的理解是4与pre_issue的大小有关,正好也是4),但是这个是怎么避免出现WAR, WAW, RAWhazard的呢?
期待你的回答,谢谢~
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