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A flexible universal ASIO driver that uses the PortAudio sound I/O library. Supports WASAPI (shared and exclusive), KS, DirectSound and MME.
32-Bit Algorithms of Floating Point Operations are implemented on Verilog with logic Operations.
Fork of the original fmc-adc-100m14b4cha-gw repository available on OHWR
New firmware for the FNIRSI-1013D osciloscope.
FOFB Controller Gateware
foobar_input_sacd
USB and S/PDIF audio DAC using the Raspberry Pi Pico (RP2040)
A modular music player using the BASS library.
Floating point Forward/Inverse Fast Fourier Transform (FFT) IP-core for newest Xilinx FPGAs (Source lang. - VHDL).
The USRP™ Hardware Driver FPGA Repository
FPGA projektek és vegyes HDL modulok.
《FPGA应用开发和仿真》(机械工业出版社2018年第1版 ISBN:9787111582786)的源码。Source Code of the book FPGA Application Development and Simulation(CHS).
A project made in Verilog for Xilinx Spartan6 FPGA board. The user interfaces the board through a PC connected via USB and using terminal such as puTTY. The project includes a Picoblze program that will output a menu of options to the users terminal where the user can then select from a list of options. These options include record, play, pause, and delete (audio increase and decrease available on physical buttons on FPGA). This project utilizes the audio codec on the Spartan6 (SM2603), the onboard DDR2 RAM, picoblaze CPU that processes user input to a state, and a finite state machine for the state produced by Picoblaze. For more details, read the readme included.
FPGA BASED USB PROTOCOL ANALYSER
The project uses a Xilinx Artix-7 FPGA on a Digilent Basys 3 board to design a clock whose seconds, minutes, & hours are displayed on a Quad 7-segment display & can also be displayed on a vga display. Picoblaze processor is used to control the Analog & Digital displays of the clock.
A highly optimized streaming FFT core based on Bailey's 4-step large FFT algorithm
This project uses a universal serial bus (USB) transceiver with a serial interface engine (SIE) and an asynchronous first-in first-out (FIFO) queue for packet transformation and data transmission in FPGA to FPGA communication.
FPGA-based USB fast communication using FT232H/FT600 chip.
An FPGA-based MII to RMII & SMII converter to connect 100M ethernet PHY chip such as LAN8720 or KSZ8041TLI-S. 基于FPGA的MII转RMII和MII转SMII,用来连接LAN8720、KSZ8041TLI-S等百兆以太网PHY芯片。
Multi-platform nightly builds of open source FPGA tools
Design files for FPGA1394 board (FPGA + FireWire)
FPGA1394 V3 PCB Design
A declarative, efficient, and flexible JavaScript library for building user interfaces.
🖖 Vue.js is a progressive, incrementally-adoptable JavaScript framework for building UI on the web.
TypeScript is a superset of JavaScript that compiles to clean JavaScript output.
An Open Source Machine Learning Framework for Everyone
The Web framework for perfectionists with deadlines.
A PHP framework for web artisans
Bring data to life with SVG, Canvas and HTML. 📊📈🎉
JavaScript (JS) is a lightweight interpreted programming language with first-class functions.
Some thing interesting about web. New door for the world.
A server is a program made to process requests and deliver data to clients.
Machine learning is a way of modeling and interpreting data that allows a piece of software to respond intelligently.
Some thing interesting about visualization, use data art
Some thing interesting about game, make everyone happy.
We are working to build community through open source technology. NB: members must have two-factor auth.
Open source projects and samples from Microsoft.
Google ❤️ Open Source for everyone.
Alibaba Open Source for everyone
Data-Driven Documents codes.
China tencent open source team.