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Generic i2c component library including support for multi master arbitration and clock stretching

Home Page: http://github.xcore.com/sc_i2c/

License: Other

Makefile 6.81% XC 63.40% C++ 1.44% C 28.35%

sc_i2c's Introduction

XCORE.com I2C Master Component

Latest release:	3.0.0rc0
Maintainer:	XMOS
Description:	I2C Software Component

The I2C Component provides the ability to write and read the I2C Compatible Slave devices.

Key Features

module_i2c:

Works at 100 Kbps and 400 Kbps
Supports Clock stretching
Supports Multi master capability.
Supports Clock synchronization.

module_i2c_simple / module_i2c_single_port:

Small footprint
Works at 100 Kbps and 400 Kbps
Single system-wide I2C bus with XCore acting as the single master.
SDA and SCL can be on a single wide port (module_i2c_single_port)

module_i2c_master:

Works at 100 Kbps and 400 Kbps
Multiple I2C busses
Supports Clock stretching
Support for Multi master capability.
Support for Clock synchronization.

Firmware Overview

The Component is in the form of a function library and can be called in a thread.

Module_i2c is meant to be deprecated, once module_i2c_master is completed, and once the slave part has been moved to module_i2c_slave.

Known Issues

does not support 10 bit addressing does not support CBUS capability. does not support HS-Mode.

Instructions for Building Project and running the simulation.

The Software Components for I2C are built using XMOS Development Environment (XDE) Version: 10.4.2 (build 1752) or later. The module can be simulated using test bench. Following steps is to followed to run the simulation

import the xcommon and xmos_i2c folders into XMOS Development Environment.

open run configuration.

In Main tab select simulator in Device options.

Select simulator Tab.

Tick enable tracing.

Tick Pads.

In Local Tracing options click on ADD button and select stdcore[1] and ports.

Select Pins tab.

Enable Pin connections

Click on Add Button.

Select stdcore[1].

Connect Port XS1_PORT_1B to XS1_PORT_1F.

Connect Port XS1_PORT_1A to XS1_PORT_1E.

Connect Port XS1_PORT_1B to XS1_PORT_1D.

Connect Port XS1_PORT_1A to XS1_PORT_1C.

Connect Port XS1_PORT_1B to XS1_PORT_1G

Connect Port XS1_PORT_1A to XS1_PORT_1H.

Connect Port XS1_PORT_1F to XS1_PORT_1D

Connect Port XS1_PORT_1E to XS1_PORT_1C.

Connect Port XS1_PORT_1F to XS1_PORT_1G.

Connect Port XS1_PORT_1E to XS1_PORT_1H.

Connect Port XS1_PORT_1D to XS1_PORT_1G.

Connect Port XS1_PORT_1C to XS1_PORT_1H.

Apply the changes and run.

In i2c_test_def.h keep MASTER_TX uncommenting for master transmit and slave receive.

For Comment MASTER_TX for slave transmit and master receive.

For single master and single slave comment MASTER2 and SLAVE2 or comment MASTER1 and SLAVE1.

for single slave and two masters select MASTER1 and MASTER2 comment SLAVE1 or SLAVE2.

for two slaves and single master select SLAVE1 and SLAVE2 comment MASTER1 or MASTER2.

for two master and two slaves select both MASTER1 and MASTER2, and SLAVE1 and SLAVE2.

run the simulation. Check for valid data on the console window.

Support

Issues may be submitted via the Issues tab in this github repo. Response to any issues submitted as at the discretion of the maintainer for this line.

Required software (dependencies)

sc_util (git://github.com/xcore/sc_util)

sc_i2c's People

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sc_i2c's Issues

Rather odd interface to i2c_simple

The declaration of the ports in the structure is very unlike how most applications are actually written.

This is completely different to the single port version also. A common interfaces is required.

Parameter device documentation

In using module_i2c_simple, the bus address parameter device is documented as:

 * \param device     Bus address of device, even number between 0x00 and 0xFE.

from the i2c.h file. However it is shifted left once in the driver prior to TX.

Should the parameter range documentation read as 0x00 to 0x7f here? The simple example is passing 0x90 but I think that the MSB goes away. For example, passing 0x68 when wanting 0xd0+direction works as expected.

2.2.3 needs to be released

With Sam's updates.

CHANGELOG also.

app_i2c_simple_uac2slave_demo doesn't build

app_i2c_simple_uac2slave_demo doesn't build due to XN issues.

/home/buildbot/.xmos/targets/STARTKIT/STARTKIT.xn:58 Error: XN11036 Link node (SOD) is incompletely specified.
Creating dependencies for main.xc
/home/buildbot/.xmos/targets/STARTKIT/STARTKIT.xn:58 Error: XN11036 Link node (SOD) is incompletely specified.
Using modules: module_i2c_simple
Compiling main.xc
/home/buildbot/.xmos/targets/STARTKIT/STARTKIT.xn:58 Error: XN11036 Link node (SOD) is incompletely specified.
xmake[1]: *** [.build/src/main.xc.o] Error 1
xmake: *** [bin//Master-i2c-app.xe] Error 2

Interface needs cleaning up

The interface is rather odd and needs to be cleaned up.

. It uses a struct that contains data, data_len, clock multiplier, and number of masters (!). data and data_len clearly belong together, but the number of masters should be part of the bus definition, and the clock multiplier belongs with the device address. Furthermore, for any normal use both device address and clock multiplier are constant.

. The data_len is measured in bytes - it is worth checking that this should not be the number of bits.

i2c_slave_rx doesn't reset data_len for the next packet

Version: 2.0.0rc0

module_i2c_simple ignores nbytes for read and write

Only works for 8 bit registers.

Missing documentation

The API documentation is there, but it is not visible since we have not created a gh_pages branch. Can somebody create it, or else add me to the team and I will...

Enhancement: i2c_slave_rx doesn't check data_len

Version: 2.0.0rc0

This can cause overflow if master is requesting too much data. Behaviour should be well defined in that case, e.g. compare the running counter j against data_len

nbytes is always 1 on i2c_single_port

I guess you should note on the module description that nbytes is always 1.

Cheers.

Use of structures

I don't like the uses of structures for resources, its a pain for something like i2c. I think the api should take calls taking the ports, speed and any there params. This allows the user to decide if they want to pack this into a structure or not.

Need a way of declaring what bits or a port are used for SDA/SCL

For _singleport...

Currently this is based on #defines compiled into the module

Slave TX function doesn't work

The slave Tx function works only for the first transaction when used with master_rx function on the master side. Resulted in corrupt transaction when tested with Beagle I2C/SPI Analyser.

There is no break caused in the primary while(1) loop caused by the detection of stop bit in the slave side.

Also the master receive – slave transmit function pair would be more useful if they are mad e more generic as a single directional interface(slave -> master only) without the sub address.

Does not work for back to back reads or writes

while(1) {
i2c_data.data_len = 1;
if (i2c_master_rx(0x2, 0x1, i2c_data, i2c_master) != 1) {
printf("Failed");
} else {
printf("Succeeded");
}
// wait for 1 second
}

Only works every 4 attempts.

sc_i2c doesn't build

Single port demo doesn't build:

../src/main.xc: In function main': ../src/main.xc:26: error: unknown function identifieri2c_master_read_reg' (possibly missing prototype?)
xmake[2]: *** [.build/src/main.xc.o] Error 1
xmake[1]: *** [bin//app_i2c_single_port_demo.xe] Error 2
xmake[1]: Leaving directory

Please fix ASAP

Read function in I2C single port

This functionality is said to be implemented in the documentation.... but it is not.
Is there any development on this side or it will just not happen?
:)