This experiment belongs to Digital Logic Design Full Name: Registers
Home Page: http://virtual-labs.github.io/exp-registers-iiith
License: GNU Affero General Public License v3.0
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Type(s) of Issue
Bug Screenshot
Description
After the simulation is completed in the demo section, the Observations Table on the right side displays the given message:
The issue here is that there is no such button called Restart in this section, so the user will not understand where to click to restart the simulation.
MODIFIED MESSAGE: Simulation has finished. Please click on Reset and repeat the instructions given to start again.
Type(s) of Issue
Description
Whenever we pause the simulation, irrespective of the speed it had earlier, it always goes back to x1 speed when we pause and start back. We have to change the speed again to the desired values every time after pausing and restarting/ just starting. So, this could be mentioned in a more clear way by adding a new instruction as follows:
The default speed is reset to x1 automatically at the beginning of every simulation or whenever you pause and resume. If you want to change the speed, you can do so only while the simulation is running (only after starting or after resuming the simulation).
Type(s) of Issue
Bug Screenshot
Issue
The message says the simulation stopped whenever we pause the simulation, but to make it clearer, it could say
Simulation has been Paused. Please click on the "Start" button to Resume.
Type(s) of Issue
Bug Screenshot
Description
As seen in the picture above, in the (Practice) section, to simulate the circuit we built for different values of inputs, we must have the option to change the input values as per our convenience and verify. To do that, it is required to double-click on the input value bits to toggle them, but this feature is nowhere mentioned in the Instructions or anywhere else in the entire experiment additionally, in the demo section, we just had to single click to toggle the input bit value and so, the user will be confused as to how to give specific values to inputs.
Also, the instructions are unclear as to what simulate and submit buttons exactly do, as simulate option changes just the output bits which is not very evident for a first-time user. So, the instructions could be made more specific and clear as given below:
Instead of "Click on the "Simulate" button to simulate the circuit and see the output.", include these instructions:
- You can set the input bits, which are by default 1, to any values of your choice for testing, by double-clicking on them.
- Click on the "Simulate" button after setting the input bits as per your choice. This will simulate the circuit you built for the input bits set and will change the output bit values accordingly, for you to test your circuit.
Also, add these instructions at the end for a more clear understanding of what submit does.
- Clicking on "Submit" will display a "Success" or "Failure" message in the Observations Section according to the correctness of your circuit. It will also display a Truth Table verifying your circuit for different input values.
Type(s) of Issue
Bug Screenshot
Description
The role of a MUX and the select bit is not clear. Its significance could be added in instructions
Type(s) of Issue
Bug Screenshot(s)
Issue
Type(s) of Issue
Bug Screenshot
ISSUE
When we change the input bit values but instead of clicking on simulate, if we click on submit, and after that, we click on simulate, it will not consider the changes that have been done before the submit step and will give the output bit values that were there earlier only. And also, if you do not remember which inputs you have changed before the submit step and have not changed it back to what you want, then the output does not behave appropriately as it will show that we have changed the input bits but the output bits will not take that change into consideration and it will get messier. This can be seen in the screenshot where we changed the value of D to 1, then clicked on submit and then clicked on simulate, it does not consider these changes and still prints the output as 1 instead of 0. So, to prevent all this, if we can refresh all the input and output bit values to default every time we click on submit, it will be easier for users to understand the process.
Bug Screenshot
Description
The select bit is 0 initially when we open the demo section but when we finished one simulation and reset, then the select becomes null or green colour and we cannot even set the bit to 0 or 1 manually as it does not allow it. It also does not start simulation until the select bit is set, so effectively,once we reset, we cannot run the simulation again.
Bug Screenhot
Description
When we simulate, it works fine but when we stop simulation, submit with the D value as 1 and then we again click on simulate without changing the values of inputs just before and simulate, it gives output as 1 whereas it must give 0
Bug Screenshot/Screencast
Issue
We see that the bits are being shifted in the end, the clock remains as 1 whereas it must be toggling because bits can be shifted by 1 position every clock cycle.
Types(s) of Issue
Bug Screenshot
Description
Add a to after out.
MODIFIED STATEMENT:
This continues until it is pushed out to the end. Like a grocery line.
Types(s) of Issue
Bug Screenshot
Description
Replace ALso by Also
Type(s) of Issue*
Bug Screenshot
Description
Replace COmputer with Computer.
Type(s) of Issue*
Bug Screenshot
Description
Type of Issue
Bug Screenshot
Description
It must be Flop and not FLop.
Type(s) of Issue
Bug Screenshot
Description
If the connections are wrong/invalid, like connecting the outputs to two different connections, connecting any of the ends to more than one connection, instead of allowing such connection, user experience would be enhanced if it did not allow multiple input sources to connect to the same endpoint.
Bug Screenshot
Description
When we use custom clock, we get the error that clk is not connected but we can only connect one clock for circuit to succeed. Similarly, if we summoned 2 custom clocks and used only one, the second custom clock can neither be deleted nor does it allow to run simulation with that first custom clock and clock bit not connected it throws an error.
Type(s) of Issue
Bug Screenshot
Issue
THIS ISSUE PERSISTS WITH ALL GATES AND THE D FLIP FLOP TOO
REFERENCES: [CHATGPT]
"question": "1. A register classifies under",
"answers": {
"a": "Sequential circuit",
"b": "Combinational circuit",
"c": "CPU",
"d": "Latches"
a) Sequential circuit: A register is a sequential circuit element because it has memory and stores data over time. It can be used to store and transfer data between different parts of a digital system. Registers are commonly used for temporary storage, data buffering, or synchronization purposes.
b) Combinational circuit: A register is not classified as a combinational circuit. Combinational circuits do not have memory elements and their output depends solely on the current input values. Registers, on the other hand, have memory and can retain information even when the inputs change.
c) CPU: Registers are an essential part of a CPU (Central Processing Unit). CPUs contain various types of registers, such as general-purpose registers, instruction registers, program counters, and flags registers. These registers store data and control signals that are used during the execution of instructions by the CPU.
d) Latches: Registers and latches are closely related but not exactly the same. Latches are simple memory elements that can store a single bit of information, while registers are composed of multiple latch stages and can store multiple bits. Registers are often constructed using interconnected latches. Therefore, while latches are a component of a register, they do not classify as registers themselves.
"question": "2. Which of the following is not a type of register",
"answers": {
"a": "PIPO",
"b": "SISO",
"c": "PISO",
"d": "PICO"
a) PIPO: This is a valid type of register. PIPO stands for "Parallel-In, Parallel-Out" register, which means it can accept data in parallel and output data in parallel.
b) SISO: This is a valid type of register. SISO stands for "Serial-In, Serial-Out" register, which means it accepts data serially and outputs data serially.
c) PISO: This is a valid type of register. PISO stands for "Parallel-In, Serial-Out" register, which means it can accept data in parallel and output data serially.
d) PICO: This is not a recognized type of register. PICO is not commonly used or recognized as a type of register in digital systems. Therefore, it is the correct answer as it is not a valid type of register.
"question": "3. PIPO shift registers use which type of flip flop",
"answers": {
"a": "D flip flop",
"b": "SR flip flop",
"c": "JK flip flop",
"d": "T flip flop"
a) D flip flop: This option is correct. PIPO (Parallel In, Parallel Out) shift registers can use D flip flops. In a D flip flop, the output (Q) follows the input (D) when a clock signal is applied. In a PIPO shift register, each flip flop in the register holds a parallel data input value and transfers it to the corresponding output when the clock signal is triggered. Therefore, a D flip flop is suitable for this purpose.
b) SR flip flop: This option is incorrect. SR (Set-Reset) flip flops are not commonly used in PIPO shift registers. SR flip flops have two inputs: Set (S) and Reset (R), which can cause unpredictable behavior when both inputs are asserted simultaneously. PIPO shift registers require a more controlled mechanism for data transfer, making SR flip flops less suitable for this application.
c) JK flip flop: This option is incorrect. While JK flip flops can be used in shift registers, they are not typically used in PIPO shift registers. JK flip flops have two inputs: J (data input) and K (inverted data input), and they can operate in various modes based on the inputs. For a PIPO shift register, a simpler flip flop type like the D flip flop is usually sufficient.
d) T flip flop: This option is incorrect. T flip flops, also known as Toggle flip flops, are not commonly used in PIPO shift registers. T flip flops have a single input called Toggle (T) that causes the output to toggle between its current state and its complemented state. While T flip flops can be used for sequential shifting operations, they are not the most suitable choice for parallel data transfer in a PIPO shift register.
"question": "4. What devices have registers used in them",
"answers": {
"a": "Computer",
"b": "Calculator",
"c": "Electric meter",
"d": "All of these"
a) "Computer": This option is correct. Computers, whether they are desktops, laptops, or even mobile devices, contain registers. Registers are small, high-speed memory units used to store and manipulate data during the execution of instructions by the computer's central processing unit (CPU).
b) "Calculator": This option is correct. Calculators, especially advanced scientific or programmable calculators, also contain registers. Registers help in performing mathematical operations and storing intermediate results during calculations.
c) "Electric meter": This option is incorrect. Electric meters are devices used to measure the amount of electrical energy consumed by a household or a building. They do not typically contain registers. Instead, electric meters use mechanical or electronic mechanisms to track and record energy usage.
d) "All of these": This option is incorrect. While options a) and b) are correct, option c) (electric meter) is not. Therefore, the correct answer is not "All of these."
REFERENCES: [CHATGPT]
"question": "1. How many iterations does a N input PIPO shift register take to reset the inputs to its original location ?",
"answers": {
"a": "N",
"b": "N/2",
"c": "log(N)",
"d": "N*N"
Let's analyze each option and provide an explanation for whether it is correct or wrong in the context of resetting the inputs of an N-input PIPO (Parallel-In, Parallel-Out) shift register to their original location.
Option (a): N
This option states that the number of iterations required to reset the inputs is N. This is incorrect. In a PIPO shift register, each input is shifted by one position in each clock cycle. To reset the inputs to their original location, all N inputs need to go through N clock cycles. Therefore, the correct answer should be N, indicating that it takes N iterations.
Option (b): N/2
This option suggests that the number of iterations required is N/2. This is incorrect. In a PIPO shift register, each clock cycle shifts the inputs by one position. If only N/2 iterations were performed, the inputs would not return to their original location. Thus, this option is not the correct answer.
Option (c): log(N)
This option proposes that the number of iterations required is log(N). This is incorrect. The logarithm function represents the number of times a value needs to be multiplied by a specific factor to obtain another value. In the context of resetting the inputs of a PIPO shift register, it is not possible to achieve the desired result in log(N) iterations. The correct answer should not involve a logarithmic relationship.
Option (d): N*N
This option suggests that the number of iterations required is N*N. This is incorrect. Multiplying N by itself implies a quadratic relationship, which is not accurate for resetting the inputs of a PIPO shift register. As mentioned earlier, N iterations are required to restore the inputs to their original location.
To summarize, option (a) is correct, as it takes N iterations for the inputs of an N-input PIPO shift register to be reset to their original location. The other options (b), (c), and (d) are incorrect because they do not accurately represent the necessary number of iterations for resetting the inputs.
"question": "2. How many clock cycles are required to serially move a input right by 3 places",
"answers": {
"a": "3",
"b": "4",
"c": "2",
"d": "1"
To serially move an input right by 3 places, we need to shift each bit to the right by one position for a total of three times. Let's analyze each option:
a) Option "3":
This option suggests that it takes three clock cycles to move the input right by 3 places. This is incorrect because we need to perform the shift three times, meaning that we need three clock cycles for each shift. Therefore, the total number of clock cycles required would be 3 * 3 = 9, not 3.
b) Option "4":
This option suggests that it takes four clock cycles to move the input right by 3 places. This is incorrect as well. Since we need to perform the shift three times, the correct answer cannot be more than 3 clock cycles. Therefore, this option is incorrect.
c) Option "2":
This option suggests that it takes two clock cycles to move the input right by 3 places. This is incorrect because, as mentioned before, we need to perform the shift three times. It would be impossible to achieve the desired result in just two clock cycles, so this option is incorrect.
d) Option "1":
This option suggests that it takes one clock cycle to move the input right by 3 places. This is the correct answer. To move the input right by 3 places, we need to perform three shifts, and each shift can be done in a single clock cycle. Therefore, the total number of clock cycles required is 3, which matches the given option.
In summary, the correct answer is option "d" because it accurately represents that it takes 1 clock cycle to serially move the input right by 3 places.
"question": "3.What is the full form of PIPO",
"answers": {
"a": "Parallel In Parallel Out ",
"b": "Serial In Parallel Out ",
"c": "Parallel In Serial Out",
"d": "Parallel Input Parallel Output"
a) "Parallel In Parallel Out": This option is correct. PIPO stands for "Parallel In Parallel Out," which refers to a type of shift register where data is both input and output in parallel. It means that data can be loaded into the register in parallel and also read out in parallel.
b) "Serial In Parallel Out": This option is incorrect. The full form of "SIPO" is "Serial In Parallel Out." In SIPO, data is inputted serially, one bit at a time, and outputted in parallel.
c) "Parallel In Serial Out": This option is incorrect. The full form of "PISO" is "Parallel In Serial Out." In PISO, data is inputted in parallel and outputted serially, one bit at a time.
d) "Parallel Input Parallel Output": This option is incorrect. It does not represent the full form of "PIPO." The correct full form is "Parallel In Parallel Out," as mentioned in option (a).
"question": "4. If I1=1,I2=1,I3=0,I4=1 in a PIPO register , what is the value of I3 after 2 clock cycles ?",
"answers": {
"a": "1",
"b": "0",
"c": "I1",
"d": "Both a and c"
Certainly! Here's the explanation for each option correctly:
Option a: "1"
In a PIPO (Parallel In, Parallel Out) register, the output shifts by one position for each clock cycle. Given the initial values I1=1, I2=1, I3=0, I4=1, after two clock cycles, the value of I3 would be the same as the value of I2 in the initial state. Since I2 is initially 1, the value of I3 after two clock cycles would be "1." This option is correct.
Option b: "0"
This option states that the value of I3 after two clock cycles is "0." However, based on the shifting behavior of a PIPO register, the value of I3 will be the same as the value of I2 after two clock cycles. Since I2 is initially 1, the value of I3 after two clock cycles cannot be "0." This option is incorrect.
Option c: "I1"
According to this option, the value of I3 after two clock cycles would be the same as the value of I1 in the initial state. However, in a PIPO register, there is no direct connection or dependency between I1 and I3. Each input bit is loaded independently, and the shifting behavior is determined by the clock cycles. Therefore, the value of I1 does not affect the value of I3 after two clock cycles. This option is incorrect.
Option d: "Both a and c"
This option suggests that both option a ("1") and option c ("I1") are correct. However, as explained earlier, option a is correct because the value of I3 after two clock cycles is indeed "1" based on the shifting behavior. Option c is incorrect because the value of I3 is not influenced by I1. Therefore, this option is incorrect.
In summary, the correct answer is option a: "1." After two clock cycles, the value of I3 in a PIPO register would be "1," which corresponds to the value of I2 in the initial state.
Bug Screenshot
Description
INitially, we see that the circuit is connected as shown in figure 1 and it gives correct Output. But next, when we delete that and gate and we place another lets say or gate in its place as shown in figure 2, then output throws an error even though it is connected properly to the inputs.
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