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A fast and flexible simulation infrastructure for exploring general-purpose processing-in-memory (PIM) architectures. Ramulator-PIM combines a widely-used simulator for out-of-order and in-order processors (ZSim) with Ramulator, a DRAM simulator with memory models for DDRx, LPDDRx, GDDRx, WIOx, HBMx, and HMCx. Ramulator is described in the IEEE CAL

Shell 4.95% Ruby 0.01% C++ 64.65% Python 0.95% Perl 2.05% C 18.57% PHP 0.20% Objective-C 0.03% Java 0.01% Fortran 0.01% C# 0.01% Assembly 2.08% CSS 0.18% TeX 2.11% Makefile 3.60% HTML 0.51% CMake 0.06% Batchfile 0.03% M4 0.02% GDB 0.02%

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