tukl-msd / gem5.bare-metal Goto Github PK

Excuse me. I want to run a binary compiled with armv8 compiler in gem5 with fs bare-metal model. I find your project and want to modified for my purpose. I want to know I should change the compiler arm-none-eabi to what? And I should modified what else ? Hope your advises, thx.

Trying to run the bare-metal example with --ruby ended in the following error

Traceback (most recent call last):
File "", line 1, in
File "/Users/ericwagner/gem5/src/python/m5/main.py", line 400, in main
exec filecode in scope
File "./configs/example/fs.py", line 341, in
test_sys = build_test_system(np)
File "./configs/example/fs.py", line 103, in build_test_system
ruby=options.ruby)
File "/Users/ericwagner/gem5/configs/common/FSConfig.py", line 374, in makeArmSystem
self.realview.attachOnChipIO(self.iobus, dma_ports=self._dma_ports)
TypeError: attachOnChipIO() got an unexpected keyword argument 'dma_ports'

Hi,
I find your code really helpful for the development base in firmware simulation,
but it turns out that L1, L2 cache simulation (such as hit/miss rate) results do not appear in the stats.txt.
Is it because the cache was not enabled yet in the kernel code?
(I'm a newbie in kernel or system area, so i don't really understand what's going on)
If that's the case, is it complicated to write a code for initializing the cache in the boot.S file?

Thank you!