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Shane Fleming's Projects

emsys_sequential_logic icon emsys_sequential_logic

Lecture for the Embedded Systems Design course (CSC368/M68) on sequential logic design with Verilog

hls_opencv icon hls_opencv

Some example code and scripts to make OpenCV HW/SW Zynq applications using embedded linux. Developed for the CAS group @ Imperial College London

mlir-aie icon mlir-aie

An MLIR-based toolchain for AMD AI Engine-enabled devices.

mmmgf icon mmmgf

VHDL code to accelerate multiplication of matrices around (1000 x 1000) elements over small finite fields

ops-sat icon ops-sat

Blog for the Imperial College Circuits and Systems Groups contributions to the OPS-SAT project.

oss-hal icon oss-hal

A base FPGA image for the OPS-SAT Swansea project

oss-rad-monitor icon oss-rad-monitor

OPS-SAT Swansea hardware/software image that will track the amount of radiation induced errors within the FPGA fabric.

parflip icon parflip

A parallel in-hardware FPGA configuration memory fault injection framework

pynq icon pynq

Python Productivity for ZYNQ

pynq-helloworld icon pynq-helloworld

This repository contains a "Hello World" introduction application to the Xilinx PYNQ framework.

relish icon relish

Runahead Execution of Load Instructions via Sliced Hardware (RELISH) -- a High level synthesis optimisation pass, which automatically constructs helper circuits used to prefetch load instructions.

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