Name: SiFive
Type: Organization
Bio: We bring RISC-V, software, and silicon experts together to innovate with a modern, software-driven approach to semiconductors.
Location: 1875 South Grant Street Suite 600, San Mateo, CA 94402
Blog: https://www.sifive.com
SiFive's Projects
Docker image and Wake environment for hardware development
An example environment package
Settings generator for Freedom E SDK Targets
Demonstrates how to use the Metal Atomics API
A simple example binary loader copying executable binary from rodata section to memory and execute from memory
Freedom Metal Example for the SiFive Bus Error Unit
An example demonstrating how to use cflush (CFLUSH.D.L1) and use FENCE to ensure flush complete
Example For Wake to run a Chisel design and unit test.
A simple example demonstrating the use of CLIC hardware vector interrupts
A simple example demonstrating how to use CLIC preemptive (level and priority) nested interrupts
A simple example demonstrating how to use CLIC selective vector interrupts
A simple example using metal APIs for set and get CSR register.
Example Chisel modules and Chisel -> Verilog Wake flow
Standard Blinky freertos example
Exercises a GPIO connected to an RTL Testbench
A simple "Hello, World!" example
Demonstrates usage of the RISC-V hardware performance counter APIs.