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risc-v-simulator-and-assembler's Introduction

RISC-V-Simulator-and-Assembler

The aim of our project was to develop an assembler for RISC-V RV32I Base Integer Instruction Set through a program written using C++ language. There were several requirements for the project that we targeted to meet in the most efficient way. Through several functions and text files, our C++ program is able to act as an assembler for any program written in RISC-V language. The program runs by reading a text file with the RISC-V language, and then reads another text file which includes all the functions names in RISC-V, the type of each function, the binary numbers of func3 and func7 as well as a number from 1-6 which refers to the case which is referred to in the code. These cases are responsible for accumulating the 32-bit binary number of each instruction using the RISC-V format. Our program consists of two cpp files, the application cpp file is responsible for the simulating the changes in the register and the memory as well as the ECALLS. The other cpp file called the Machine Code reads the text files and converts them to hexadecimal machine code.

Overall, our program reads each instruction and translates it into machine code in 8-digit hexadecimal values, and then pushes each instruction in a vector. All the instructions are then returned to the main and outputted. Our assembler works by adding the RV32i instruction to the text file called ‘test’, press run and then the output will be outputted to the screen, and in an output text file ‘Outfile’.

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