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XDIVINSA: eXtended DIVersifying INStruction Agent to mitigate power side-channel leakage

License: MIT License

Shell 0.04% Verilog 98.61% Makefile 0.23% Assembly 0.21% C 0.72% Tcl 0.12% Scala 0.05% Python 0.02%

instruction-set-extension risc-v side-channel side-channel-attacks countermeasures hardware-diversification

xdivinsa's Issues

Evaluating a case-study of modular exponentiation algorithm

[ ] Implement the modular exponentiation function using multi-precision package of libscarv with a naive algorithm and some side-channel countermeasure algorithms as the baseline of the evaluation.
[ ] Implement the modular exponentiation function applied xdivinsa instructions using a performance optimised algorithm, i.e. siding window.
[ ] Use TTest and Channel Capacity to evaluate the leakage on both timing and power consumption channels

Platform Integration

[x] Integrate to the bsp-sakura-x as an external repository.
[x] Connect to the SoC with rocket chip.
[x] Build bitstream for Sakura-x.
[x] Build a test program in C to verify the correctness of the implemented intructions.

Evaluation of the leakage of `xdivinsa` instruction

[ ] Add functions in SASS-RIG to collect the power traces of performing xdivinsa instructions on sakura-x platform.
[ ] Perform TTest evaluation on the measured power traces

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