Multiple ports connected with verilog assign do not match. about netgen HOT 4 OPEN

I think this is solvable by another method. All shorted pins are by definition permutable. Netgen is always identifying the shorted pins, so I can call PermuteSetup() whenever any one is found. Then I just need to figure out where in MatchPins() to check for permutations.

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After looking into it briefly, I think the issue is a red herring and the problem is deeper and more insidious. The MatchPins() routine should have correctly matched the pins. The problem is that only 7 or 8 pins were in the list of nodes passed to MatchPins(). I'm still investigating why.

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@d-m-bailey : Netgen version 1.5.269 should fix this problem.
The root cause of the problem was fixing another problem (a while ago), also having to do with shorted pins. An original method I had used for shorted pins was to group them together, but then it was found that moving the pins around like that caused other matching issues. But at the time I wasn't sure if there was other code that depended on the shorted pins being grouped together. So you found one of those (I think the only one).

The only potential issue now is that the reason that I had grouped shorted pins together was to avoid an extra loop over pins; without the grouping, I now have a place in the code that does a triple loop over pins. This example has a "largish" number of pins, and I don't see any noticeable performance impact, so I'm going to assume it's not an issue. But keep an eye out.

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If you have a chance, please check that #80 and #81 are (still) properly resolved. #81 was the issue whose solution caused this problem.

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