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professional-services-data-validator

Utility to compare data between homogeneous or heterogeneous environments to ensure source and target tables match

pronoc

Prototype-network-on-chip (ProNoC) is an EDA tool that facilitates prototyping of custom heterogeneous NoC-based many-core-SoC (MCSoC).

ptii

Ptolemy II is an open-source software framework supporting experimentation with actor-oriented design.

pulp

This is the top-level project for the PULP Platform. It instantiates a PULP open-source system with a PULP SoC (microcontroller) domain accelerated by a PULP cluster with 8 cores.

pulp-sdk

pulp-tools

putty

PuTTY 中文版，原 http://code.google.com/p/puttycn 项目。

putty-1

mirror of git://git.tartarus.org/simon/putty.git, used for client testing

putty-2

My patches against Simon's PuTTY

putty-3

A mirror of the PuTTY codebase with additions to psftp.exe and plink.exe

putty-4

Github clone of git://git.tartarus.org/simon/putty.git

puttyplus

PuttyPlus可用作SSH Client、串口调试、ADB Shell登陆工具，也可作为windows console使用。

pycharmprojects

Python example and test case with Pycharm IDE

pylog

PyLog: An Algorithm-Centric FPGA Programming and Synthesis Flow

pytesser

Automatically exported from code.google.com/p/pytesser

pythia

A customizable hardware prefetching framework using online reinforcement learning as described in the MICRO 2021 paper by Bera et al. (https://arxiv.org/pdf/2109.12021.pdf).

python-machine-learning-book-2nd-edition

The "Python Machine Learning (2nd edition)" book code repository and info resource

pythontest_qshan

python try run folder

qemu

Official QEMU mirror. Please see http://wiki.qemu.org/Contribute/SubmitAPatch for how to submit changes to QEMU. Pull Requests are ignored. Please only use release tarballs from the QEMU website.

qflow

Qflow full end-to-end digital synthesis flow for ASIC designs

qrouter

Qrouter detail router for digital ASIC designs

quarkts

An open-source OS for embedded applications that supports prioritized cooperative scheduling, time control, inter-task communications primitives, hierarchical state machines and CoRoutines.

ramulator

A Fast and Extensible DRAM Simulator, with built-in support for modeling many different DRAM technologies including DDRx, LPDDRx, GDDRx, WIOx, HBMx, and various academic proposals. Described in the IEEE CAL 2015 paper by Kim et al. at http://users.ece.cmu.edu/~omutlu/pub/ramulator_dram_simulator-ieee-cal15.pdf

ramulator-pim

A fast and flexible simulation infrastructure for exploring general-purpose processing-in-memory (PIM) architectures. Ramulator-PIM combines a widely-used simulator for out-of-order and in-order processors (ZSim) with Ramulator, a DRAM simulator with memory models for DDRx, LPDDRx, GDDRx, WIOx, HBMx, and HMCx. Ramulator is described in the IEEE CAL 2015 paper by Kim et al. at https://people.inf.ethz.ch/omutlu/pub/ramulator_dram_simulator-ieee-cal15.pdf Ramulator-PIM is used in the DAC 2019 paper by Singh et al. at https://people.inf.ethz.ch/omutlu/pub/NAPEL-near-memory-computing-performance-prediction-via-ML_dac19.pdf

ramulatorsharp

RamulatorSharp is a fast and flexible memory subsystem simulator implemented in C# and it can easily run on Linux, OS X, and Windows. The simulator contains the implementation of the Low-Cost Inter-Linked Subarrays (HPCA 2016) and ChargeCache (HPCA 2016) in addition to other features present in the C++ version of Ramulator: https://users.ece.cmu.edu/~omutlu/pub/lisa-dram_hpca16.pdf https://users.ece.cmu.edu/~omutlu/pub/chargecache_low-latency-dram_hpca16.pdf

ratatoskr

Ratatoskr NoC Simulator

ready-to-run

real-time-voice-cloning

Clone a voice in 5 seconds to generate arbitrary speech in real-time

redguardtoo.github.io

my blog

reliablenoc

Branch-and-bound (BB) algorithm to solve the problem of energy- and reliability-aware mapping for regular NoCs. Reliability is estimated by an efficient Monte Carlo algorithm based on the destruction spectrum of the network. The tool is developed on top of "nocmap 1.2" from CMU.