How to change the data width of the input and the output of the hwpe-mac-engine? about hwpe-mac-engine HOT 3 OPEN

That work, and also this example, are based on an outdated version of the HWPE IPs, so beware. You will find documentation here https://hwpe-doc.readthedocs.io/en/latest/ -- much of what you ask for is better provided by HCI based IPs (https://github.com/pulp-platform/hci)
My suggestion is also to look at other (more complete and complex) examples such as https://github.com/pulp-platform/redmule .

In detail:

1. yes, you can
2. you can have as many ports as you want
3. I believe so, although I don't think we have ever tried with such config
4. You will need to redefine parameters accordingly.

Let me add a bit of adv: during the EFCL summer school in June we will organize a track strictly related to these activities: https://efcl.ethz.ch/efcl-summer-school/the-event/track-2.html

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Hi @FrancescoConti,

Thank you for your detailed response and for pointing out the outdated version of the HWPE IPs. I'll make sure to refer to the documentation you provided, as well as explore the HCI based IPs. The suggestion to check out more comprehensive examples like Redmule is also appreciated; it will undoubtedly provide a deeper understanding of the concepts.

Regarding your specific points:

• It's great to know that it's feasible to increase TCDM port size.
• I'll keep in mind the need to redefine parameters accordingly when working with different configurations.

Thanks also for the heads-up about the EFCL summer school track in June.

Once again, I appreciate your guidance and assistance.

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Hi @FrancescoConti ,
Is it possible to run redmule testbench on non-eth system? Because the makefile of redmule is designed based on the environment variables set on the eth computers, and on changing the path of the variables in the makefile (such as that of questasim), I am getting the Permission denied error.

# ** Error (suppressible): (vlog-19) Failed to access library 'work' at "/home/c2sd2/pulpissimo/install/modelsim_libs/tb_lib".
# Permission denied. (errno = EACCES)
# ** Error: Verilog Compiler exiting
# End time: 15:44:21 on Apr 16,2024, Elapsed time: 0:00:00
# Errors: 2, Warnings: 0
Makefile:176: recipe for target 'hw-build' failed
make: *** [hw-build] Error 1

Also if it's possible, then can I get some guidance on how to run it in pulpissimo on fpga zedboard?
Thank you

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