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FPGA as an OpenMP Offloading Device.

Home Page: http://www.hardcloud.org/

License: Apache License 2.0

Shell 0.30% SystemVerilog 65.86% CMake 0.06% Makefile 0.31% C 2.66% Verilog 30.56% Tcl 0.01% Roff 0.03% Python 0.23%

hardcloud openmp harp

hardcloud's Introduction

HardCloud - Intel HARP2 as an OpenMP Offloading Device.

The computing industry has recently proposed the use of FPGAs as a way to improve performance and energy efficiency in modern cloud clusters. Unfortunately, using such FPGA clusters is a very hard and complex task. In this context, we present HardCloud a novel and simple mechanism to offload computation to the FPGAs available in the Intel HARP2 platform. HardCloud extends OpenMP directives in such a way that the FPGA becomes just another OpenMP acceleration device that can be used directly from any user program. The example below shows a simple use of the syntax that was adopted.

#pragma omp target device(HARPSIM) map(to: A) map(from: B)
#pragma omp parallel for use(hrw) module(loopback)
// Code that represents the loopback bitstream
for (int i = 0; i < NI; i++) {
    B[i] = A[i];
}

Documentation, Installation, and Configuration

All the information is provided in the Wiki.

hardcloud's People

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efeslab guido-araujo amamory-ampere

hardcloud's Issues

not working with both HARP and HARPSIM plugins

When build the HARP and HARPSIM plugins, the simulator plugin does not work.

The temporary solution is to delete the file libomptarget.rtl.harp.so.

port all samples to xilinx alveo

xilinx alveo plugin document

any idea for zero copy?

The latest version of MPF added the functionality to automatically pin pages in FPGA page table when AFU accesses them. This makes it possible for zero copy in Hardcloud.

reimplement check clause

check clause

A code example of OpenMP check clause use:

#pragma omp target device(HARP) map(to: X) map(from: Y)
#pragma omp parallel for use(hrw) module(myhrw) check
for (int i = 0; i < size; i++) {
  Y[i] = f(X[i]);
}

The implementation of the proposed technique consists of modifying the Clang OpenMP
runtime code generation to create LLVM intermediate representation (IR) to verify the
results. Moreover, besides the offloading, the new IR transforms the code to execute the
software in the host and write the results in a temporary variable. After the device finishes the
computation, a match function, also inserted, will compare the device output to a temporary
variable.

Finally, a message will inform the user if any error occurs during this comparison and
could provide additional information, like power consumption and cache miss in Intel HARP
platform. When comparing the results, the target device might work with a different precision
than the host device because of that if the values mismatch, an error percent will be
shown.

aes128
fft
fir
gaussian
grayscale
grn
md5
reed_solomon_decoder
sha512
smith_waterman
sobel

xilinx alveo docker image

variables map between OpenMP and HardCloud buffer

Consider the following example:

#pragma omp target device(HARPSIM) map(to: A, B, C) map(from: D, E, F, G, H)
#pragma omp parallel for use(hrw) module(loopback)
for (int i = 0; i < NI; i++) {
  // some code
}

In the hardware side, the IP developer expect the pattern below:

Variable	Buffer Number
A	0
B	1
C	2
D	3
E	4
F	5
G	6
H	7

However, this is not true because depend of the code inside the for loop.

Synopsys VCS support

If you follow the tutorial, the compilation will crash. The makefile only supports ModelSim AE 10.5c.

The temporary solution:

if your project don't use vhdl, remove line 8 of file hardcloud/ase/ase_sources.mk
change the relative path from '../../' to '../' in hardcloud/samples//hw/vlog_files.list

I will modify the files to support the Synopsys VCS simulator.

tks!