Code for FSM for which patterns (with overlapping) can be edited and set, implemented using Basys 3 FPGA (Diligent Systems) and coded using Vivado, in Verilog.
neelabhro / basys3-fpga-fsm-pattern-recognition Goto Github PK
View Code? Open in Web Editor NEWCode for FSM for which patterns can be edited and set using Basys3 FPGA by Diligent(Xilinx)