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-implementation-of-ann-to-predict-handwritten-language-using-verilog

About Implementation of ANN to predict Handwritten Digits using Verilog: Multiplier and Accumulator (MAC), Accumulator(ACC) design, Integrating with sigmoid IP block. Sigmoid is implemented using LUT.

1bit_adder_fpga_verilog

1bit_adder_fpga_verilog

2dconv-fpga

A 2D convolution hardware implementation written in Verilog

5-stage-pipeline-risc-v-rv32i

The goal of this Project is to design a RISC-V processor with 5 pipeline stages. The version of the RISC-V processor supports only a limited subset of the whole RV32I instruction set, but in the design here reported all the standard instructions except ECALL, EBREAK, and FENCE are implemented.

6t_sram

Design, Implementation and Simulation of 6T SRAM Cell under Mixed Signal SOC Design Marathon using eSim & SKY130 by FOSSEE & IITB with Mr. Kunal Ghosh

aca-csu_approximate-adders

MATLAB and HDL models of ACA-CSU approximate adders

acarithmeticunits

Some approximate computing arithmetic units

accann

🐆 A compiler from AI model to RTL (Verilog) accelerator in FPGA hardware with auto design space exploration for *AdderNet*

accdnn

A compiler from AI model to RTL (Verilog) accelerator in FPGA hardware with auto design space exploration.

accept

an approximate compiler

acla

Software and Hardware models of Approximate Carry-Lookahead Adder with Intelligent Carry Judgement and Correction

adapt

Fast Emulation of Approximate DNN Accelerators in PyTorch

adaptive-approximate-computing

Adaptive approximate computing on hardware accelerators

adder-models-for-approximate-computing

Python implementation of Approximate Adders characterized by their truth table

adder_multipliers_verilog

4, 8, 16 bits of adders and multipliers Verilog codes for different architectures

addernet

Code for paper " AdderNet: Do We Really Need Multiplications in Deep Learning?"

af_testcode_cnn

Proposed Enhance CORDIC Based Activation function validation of on CNN

ai-chip

A list of ICs and IPs for AI, Machine Learning and Deep Learning.

ai-matrix

To make it easy to benchmark AI accelerators

ai_and_memory_wall

AI and Memory Wall blog post

aichip_paper_list

aim

AIM: Accelerating Arbitrary-precision Integer Multiplication on Heterogeneous Reconfigurable Computing Platform Versal ACAP (Full Paper accepted to ICCAD2023)!

aimet

AIMET is a library that provides advanced quantization and compression techniques for trained neural network models.

alpa

Auto parallelization for large-scale neural networks

altsplit

An MPI-based distributed model parallelism technique for MLP

am-lib_approx_multipliers

Approx_multipliers

ann_fc

Neural Network

any-precision-dnns

Any-Precision Deep Neural Networks (AAAI 2021)

appoximate-multiplier-using-dual-stage-4-2-compressors

approxbench

benchmarks for approximate computing