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MPLAB® PowerSmart™ SDK - Digital Control Library Designer Configuration Tool & Code Generator

Home Page: https://microchip-pic-avr-tools.github.io/powersmart-dcld/

digital-signal-processing digital-power dspic dspic33 dspic33ep dspic33ck dspic33ch power-control power-converters power-supply

powersmart-dcld's Introduction

MPLAB PowerSmart™ SDK for Microchip dsPIC33® Digital Signal Controllers
Digital Control Library Designer (PS-DCLD)
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Version 0.9.14.678 Release Notes:
---------------------------------

This additional release was necessary after having moved the website location of PowerSmart™ DCLD to the new Github organiztation Microchip PIC & AVR Tools,
updating links to websites and user's guide. No further changes have been made.


Version 0.9.14.676 Release Notes:
---------------------------------

New Features:

1) Anti-Windup Minimum Auto-Zero Feature Improvement

The Anti-Windup Limiter Auto-Zero feature clamps the output value to zero when the control output is less than the declared minimum threshold.
This feature can improve no-load regulation in asynchronous topologies. In this version the control output history is still updated with the most recent control output value while the zero'ed value is written to the declared target memory address (e.g. PWM duty cycle register)
For improved cycle-skipping mode, this feature can be combined with the Output Saturation feature to improve transitions into and from cycle-skipping to constant frequency output operation.

2) Mirrored Control Output with Offset

The multi-output support got extended by the Mirror Output With Offset option. The Mirrored Output option allows to write the most recent control output to two different target variables/registers simultaneously. The extended option in this version adds an user-specified offset value to the most recent control output before writing it to the alternate target address.
This feature becomes useful in multiphase control systems, where one loop is controlling one primary phase, and PWM steering is used for current balancing across the remaining phases.


Optimizations:

1) Anti-Windup Option Combination

When enabling multiple Anti-Windup Limiter features simultaneously, several conditions need to be combined in source code. The conditional bit- and value-test instruction sequence has been re-organized to reduce the overall number of cycles of minimum and/or maximum value clamping overrides.

2) P-Term Control Nominal Output Setting for Phase-Shifted Converters

When setting up a P-Term control loop for plant measurements of phase-shifted converters, the phase shift value was previously set by specifying the amount of overlap in [%]. This seems to have been a non-intuitive approach. In this version the specification was changed to use Degrees of Phase Angle between overlapping PWM waveforms to be more intuitive.


Bugfixes:

1) Input/Alternate Input Port Swapping

Rating: Medium
Status: Fixed

In floating point and dual bit-shifting scaling mode, input port swapping failed when used in combination with output port mirroring. 

2) Reviewed comments

Rating: Low
Status: Fixed

Comments in generated code has been reviewed and some obsolete/misleading descriptions have been corrected.

3) Input gain calculation of current feedback circuits

Rating: Low
Status: Fixed

Recalculating the maximum sense value got accidentally bypassed causing the user input sanity-check validation to fail when the new feedback gain changed to a degree where the previously calculated maximum sense value exceeded the ADC voltage reference.



Important Change Notes - (Impact on Existing Projects):

1)  API Changes

a) Renamed Extension Function Hook Names

    Some extension function hook names seemed to create confusion among users. Therefore we took the opportunity to get this straight before the use of this new feature is spreading to wide, affecting too many firmware projects.

    These extension function hooks have been renamed:

    - `ptrExtHookTargetFunction` has been renamed to `ptrExtHookPreTargetWriteFunction`
    - `ExtHookTargetFunctionParam` has been renamed to `ExtHookPreTargetWriteFunctionParam`

    - `ptrExtHookStopFunction` has been renamed to `ptrExtHookEndOfLoopFunction`
    - `ExtHookStopFunctionParam` has been renamed to `ExtHookEndOfLoopFunctionParam`

    - `ptrExtHookEndFunction` has been renamed to `ptrExtHookExitFunction`
    - `ExtHookEndFunctionParam` has been renamed to `ExtHookExitFunctionParam`


    Compiling code using any of the previous declarations will result in compiler error: 

    `[path]/[file name]:[line number:column] error: 'volatile struct NPNZ_EXTENSION_HOOKS_s' has no member named 'ExtHookExitctionParam'`


2)  Execution of Generated Code / Timing
(none)



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(c) 2021, Microchip Technology Inc.

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powersmart-dcld's Issues

Add Option to Reduce Numerical Error In Compensator Output

For some values of compensator coefficients, typically when the frequencies of the poles and zeros are small compared to the sampling frequency, there is significant numerical error in the compensator output, which leads to a failure to integrate the error for small error values and an offset in the controller.

The root cause is that the sum of the X terms is smaller than one bit, so the error fails to integrate between updates in the compensator.

It would be useful if the software checked the coefficients for these issues and warned the user, similar to how it checks for numerical error in the coefficients themselves.

Additionally, if the lower 16 bits of the Y terms are stored and used in the calculations of future Y terms this issue would be greatly reduced/eliminated. Doing so should only take ~3 instructions per Y term in the compensator and would be a very useful software option.

Add XML Support

Class: Feature Request
Complexity: Epic
Priority: Medium

For better support of MPLAB X embedded XML support is required allowing DCLD to directly read from and write to the configurations.xml and project.xml files used by MPLAB X. These files allow DCLD to read the recently selected dsPIC device type, which can be used to better tailor code generation options, as well as adding newly generated files to an existing MPLAB X project automatically.

#### Settings History

Class: Feature Request
Complexity: Story
Priority: Medium

DCLD should offer the option to save the history of settings which got generated in the past. This would be very useful while tuning/optimizing control systems on the bench. Different settings would have to be evaluated and different evaluations would have to be compared, which requires to step back and forth through different combinations of settings. Having a list of previously used settings, allowing users to simply step through the output history with a mouse click would be very valuable.

#### Input Signal Rectification

Class: Feature Request
Complexity: Item
Priority: High

This feature request is an extension to the Input Signal Offset Compensation feature, where a control bit defined in the status word of the cNPNZ16b_t data object allows users to negate the input data signal. As a result, negative values will be fed as positive numbers into the compensation filter computation.

Example use case:

This feature is required to support bi-directional control systems. Bi-directional converters may have one current sense source where the zero point is offset by a certain voltage. Positive currents are defined as signals above this zero-line and negative currents are defined as signals below the zero line.
When using the Input Signal Offset Compensation feature only to account for input data gain correction, this would inevitably result in negative numbers being fed into the inverting control loop, effectively making the control loop non-inverting and therefore nonfunctional.

Input Data Gain Accuracy Improvement

Class: Feature Request
Complexity: Story
Priority: Medium

Effective input data ranges may be very different from the definition range supported by DCLD today. For example, DCLD defines a Total Input Data Length, which is used for data normalization (e.g. 12-bit wide data). This defined range is internally assumed to define the total dynamic 0-100% visibility range of the real signal. However, in real-world designs the effective input signal dynamic range can be very different, resulting in deviations of the estimated input gain.

To optimize this gain accuracy, additional text boxes have to be added allowing users to specify min/max thresholds of the incoming data. the ratio between the real signal range and the given data length in [bit] then can be incorporated as input gain correction factor.

MPLAB X Project Assignment

Class: Feature Enhancement
Complexity: Item
Priority: High

When DCLD configuration files are saved to the MPLAB X project folder, relative path inclusions in source file are automatically correct and no compiler conflicts occur. However, when the DCLD configuration is stored in some other place and relative paths are used in file inclusions or by the code generator, conflicts might occur between C-Compiler and DCLD- generated header file paths. A reference to the MPLAB X project in which the generated files are used would solve the problems.

Add Adaptive Gain Modulation (AGM)

Class: Feature Request
Complexity: Epic
Priority: Medium

Adaptive Gain Modulation (AGM) is a specific implementation allowing to modulate the integrator gain of the feedback loop during runtime on a cycle-by-cycle basis. the gain modulation can be based on different, physical factors. deriving these factors still needs to be done in user code. However, to allow users to apply gain modulation schemes, a defined access point inside the compensator code is required. This modulation factor is a simple 16-bit number which is multiplied on the recent result of the filter B-term before it is accumulated to the filter A term.

This feature might be enhanced by adding pre-defined modulation factor determination such as volt-second ratios (voltage across inductor), which would apply to all forward converter types and work as an enhanced feed-forward term responding to both ends of the converter (input as well as output voltage transients/variations)

Real-Time Loop Tuning

Class: Feature Request
Complexity: Epic
Priority: Medium

DCLD should be enabled to communicate with the target device while executing the previously generated control loop, allowing to download new coefficients to be applied during runtime.
This feature may be restricted to modified pole- and zero locations only as controller type and code generation options require source code changes which can only be applied during compile time

#### Input Singal Offset Compensation

Class: Feature Enhancement
Complexity: Item
Priority: High

DCLD supports input offset compensation since version 0.9.60. The implementation subtracted a user defined value from the incoming data before processing its value through the compensator code module. The original implementation assumed the user-defined threshold to be an absolute zero line. Thus all negative result of the offset compensation computation got cut off and auto-zero'ed.
During practical applications it turned out, that this has a high potential risk of injecting growing offsets into the control loop integrator when the real offset defines from the user-defined level.

The offset compensation therefore needs to be reworked to allow dynamically changing offset levels above and below the user-defined center line.

Add Spread Spectrum Modulation to Assembly Code Generation

Class: Feature Request
Complexity: Item
Priority: Medium

Spread Spectrum Modulation (SSM) is a highly efficient cycle-by-cycle PWM modulation technique used to efficiently spread the noise spectrum to improve EMC. It's commonly implemented by utilizing the LFSR register as pseudo random generator. The random number derived from this register is used as fractional factor which can be masked with user-defined bit masks to restrict the modulation range to a limited percentage ratio. This windowed modulation factor is then multiplied with all timing values (e.g. period, duty cycle, phase shifts, ADC trigger locations) simultaneously. As all target registers are known at runtime, SSM can be implemented as generic code block into the control loop assembly code to ensure most efficient execution.

C-Code Template Script

Class: Feature Request
Complexity: Epic
Priority: Medium

Outsource C-code templates to external script file to allow users to modify/manipulate generated C-source and C-header file contents.