The main objective of this project is to implement a simple low cost synthesizer with krypton development board using Quartus tool. This project is just an prototype of synthesizer This is a main motivation behind this project. The software module for tone generation and display is written in hardware description language VHDL. Further the synthesized code is transferred to CPLD board (krypton) which the system is implemented. A complex programmable logic device (CPLD) is a programmable logic device with complexity between that of PALs and FPGAs, and architectural features of both. The main building block of the CPLD is a macrocell, which contains logic implementing disjunctive normal form expressions and more specialized logic operations. Some of the CPLD features are in common with PALs Non-volatile conguration memory. Unlike many FPGAs, an external conguration ROM isnt required, and the CPLD can function immediately on system start-up.For many legacy CPLD devices, routing constrains most logic blocks to have input and output signals connected to external pins, reducing opportunities for internal state storage and deeply layered logic. This is usually not a factor for larger CPLDs and newer CPLD product families.This report discusses in detail the description of hardware and software module along with the appropriate result.