CHK, DIVU, DIVS trap case cycles differs from Musashi about r68k HOT 6 CLOSED

I think if we don't open PRs, we should at least consider opening issues in Musashi for the various differing cycle counts (now also the Scc + reg instructions) in order to keep track of them and increase the off chance that someone else fixes that in Musashi ;)

from r68k.

Indeed

from r68k.

I think it would be fine for now to open issues and maybe do some fixes later.

from r68k.

Now we have multiple workarounds for this in place - we now both ignore cycles when an CHK or 0DIV exception occurs, and have gotten a few PRs accepted for undoing the instruction cycles in TRAP/TRAP#n exceptions. The former could perhaps be removed once we verify that the cycle result for the exception cases are as expected.

from r68k.

I forgot to mention that even after the PRs, ignoring cycles are still needed, because there are still differences, because Musashi does not take EA-calculation time into account for TRAP/TRAP#n, and thus returns a constant value regardless of EA-mode of the instruction.

from r68k.

Ah I see

from r68k.