Comments (8)
Evening @ungultig1 ,
You are correct, there is no rule for whitespace around most operators. I am currently away from a computer until June 2nd. I will add a rule shortly after that date.
Regards,
--Jeremy
from vhdl-style-guide.
Morning @ungultig1 ,
I have pushed an update for this issue to the issue-1171
branch. When you get a chance could you validate it on your end and let me know if it is working on your end?
Thanks,
--Jeremy
from vhdl-style-guide.
Morning @ungultig1 ,
Just wanted to ping you to see if you had a chance to check out the update.
Thanks,
--Jeremy
from vhdl-style-guide.
@jeremiah-c-leary I'm currently getting your tool working in my workflow and was looking for exactly this rule.
Hopefully I'll be able to test this at some point tomorrow.
Leaving this comment to hopefully remind me 😊
from vhdl-style-guide.
Morning @domWalters ,
It would be great if you could validate this issue.
--Jeremy
from vhdl-style-guide.
Evening @ungultig1 ,
Just wanted to ping you to see if you had time to validate the update.
--Jeremy
from vhdl-style-guide.
Morning @domWalters ,
It would be great if you could validate this issue.
--Jeremy
Tried this new config option this morning, looks good to me.
from vhdl-style-guide.
Awesome,
I will merge this to master.
--Jeremy
from vhdl-style-guide.
Related Issues (20)
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- Whitespace rules should allow <= operator HOT 8
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- Python egg for version 3.25 is broken HOT 4
- Missing auto fix for signal_100, variable_100, type_100, etc HOT 2
- architecture_026 fixable does not work HOT 1
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- Unknown reason for some words to be lowercase while other are not changed when running VSG HOT 1
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