Comments (8)
Any conf.vh file created by hw_defines.py
But see the commented hw_defines.py verilog2tex.py call in hw_setup of i2s
commented because it does not work
uncomment, use the conf.vh generated with hw_defines instead of the one I created statically in document /tsrc
make setup
make -C ../iob_ doc-build DOC=ug
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The ifdef check could be easily removed or changed as sugested from the hw_defines.py
script. I kept it to be similar to the sw_defines.py
output.
However, this looks like a problem with verilog2tex.py
that cannot support empty verilog defines.
- Removing or changing the define fixes the problem for now
- But the problem will appear next time there is an empty define in the parsed files by
verilog2tex.py
script
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can you fix verilog2tex.py then ?
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Point me to an example where the scripts fails and I can give it a shot.
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*in hardware/src, not document/tsrc
from iob-lib.
Isn't a simple fix just not generating empty defines?
generate
`define IS_APPLE 1
even if
`define IS _APPLE
would be sufficient
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this doesn't seem to be an issue anymore.
From latest iob-cache build lib
added the file: generated_header.vh
:
`ifndef NEW_SPECIAL_MACRO
`define NEW_SPECIAL_MACRO
`endif
The run the following commands:
make setup
submodules/LIB/scripts/verilog2tex.py ../iob_cache_V0.10/hardware/src/iob_cache.v ../iob_cache_V0.10/hardware/src/iob_cache_conf_iob.vh ../iob_cache_V0.10/hardware/src/iob_cache_conf_axi.vh ../iob_cache_V0.10/hardware/src/iob_cache.vh generated_header.vh mkregs.conf
script runs until the end without errors
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solved
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Related Issues (20)
- C formatter HOT 1
- asymetric modes not being tested HOT 1
- clk and reset ports should be generated HOT 1
- _setup_regs should copy the iob_ctls source
- bad function name
- pass addr_w and data_w when generating interfaces
- mkregs shoudl connect to ios
- mkregs.py: version reg not assigned HOT 1
- if_gen.py: prefix should affect ADDR_W and DATA_W HOT 1
- interfaces clkrst and clkrsten should be generated so we can add a prefix HOT 3
- mkregs.py HOT 1
- Add support for WR registers in mkregs
- ports to external memories should be generated HOT 2
- iob-lib/python-setup: copies software of modules that are only for simulation porpoise. HOT 5
- _create_submodules_list should be deprecated
- tester must have iob-soc block groups HOT 1
- iob_fifo_async: implicit definition of `clk_i`, `cke_i` and `arst_i` wires
- verilog2tex.py has been deprecated
- branch: if_gen -> allow specifying parameters when defining interface.
- IOb-Bus Documentation
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