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jjts avatar jjts commented on July 20, 2024

Hi @goforit19,

Thanks for your interest.

The Verilator testbench is in hardware/simulation/verilator/testbench.cpp

It does not do more than activate the clock and reset signals.

We suggest creating a test program starting from testbench.cpp and adding test cases.

Then you can evaluate code coverage with Verilator itself.

Enjoy!

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goforit19 avatar goforit19 commented on July 20, 2024

Hi @jjts,

Thank you for your response.

Do we have any sample test program which can be used as starting point?

Also, by adding test cases in testbench.cpp, so it would functional testing if I understand it correctly. Is there no scope of performing unit test with Gtest framework on public APIs of verilated source code?

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jjts avatar jjts commented on July 20, 2024

Hi, testbench.cpp is the starting point!

We never thought about using Gtest but sounds cool.

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goforit19 avatar goforit19 commented on July 20, 2024

Hi,

Okay, got your point about the starting point.

But, is there any user documentation which explains basic flow structure of the iob-cache and how we can use it? I am unable to generate User guide with the commands provided. So, it is difficult to understand as a user on how to use it and which sequence to follow for a basic successful test case.

May be it would be more to ask for, but isn't it possible to provide sample successful test case or flow structure which can help understand a new user like me how to start.

Many thanks in advance for your support and help on this topic.

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jjts avatar jjts commented on July 20, 2024

Hi @goforit

please see branch doc where the verilator testbench and can now to a simple write/read test.

As for the documentation it is WIP on the same branch

Thanks!

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jjts avatar jjts commented on July 20, 2024

@goforit, if you can use this test I will close this issue, as there are already other issues concerning the docs.

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goforit19 avatar goforit19 commented on July 20, 2024

@jjts Yes, the test works for me as well. Although I would like to see the documentation to understand full features of iob-cache and use it.

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jjts avatar jjts commented on July 20, 2024

we're working on it :- )

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goforit19 avatar goforit19 commented on July 20, 2024

make sim SIMULATOR=verilator
make -C ./hardware/simulation/verilator run
make[1]: Entering directory '/home/Work/21May/iob-cache/hardware/simulation/verilator'
set -e; ../../../submodules/AXI/software/axi_gen.py axi_m_port 32 32
verilator --cc --exe -I../../../hardware/include -I../../../submodules/LIB/hardware/include -I../../../hardware/simulation/testbench ../../../submodules/MEM/hardware/regfile/iob_regfile_sp/iob_regfile_sp.v ../../../submodules/MEM/hardware/ram/iob_ram_2p_asym/iob_ram_2p_asym.v ../../../submodules/MEM/hardware/fifo/iob_fifo_sync/iob_fifo_sync.v ../../../submodules/MEM/hardware/ram/iob_ram_2p/iob_ram_2p.v ../../../submodules/MEM/hardware/ram/iob_ram_sp/iob_ram_sp.v ../../../hardware/src/iob_cache_memory.v ../../../hardware/src/iob_cache_read_channel.v ../../../hardware/src/iob_cache_front_end.v ../../../hardware/src/iob_cache_write_channel.v ../../../hardware/src/iob_cache_read_channel_axi.v ../../../hardware/src/iob_cache_write_channel_axi.v ../../../hardware/src/iob_cache_replacement_policy.v ../../../hardware/src/iob_cache_onehot_to_bin_encoder.v ../../../hardware/src/iob_cache_back_end.v ../../../hardware/src/iob_cache.v ../../../hardware/src/iob_cache_axi.v ../../../hardware/src/iob_cache_back_end_axi.v ../../../hardware/src/iob_cache_control.v testbench.cpp ../../../submodules/AXI/submodules/V_AXI/rtl/axi_ram.v iob_cache_wrapper.v --top-module iob_cache_wrapper -Wno-lint --trace
%Error: ../../../hardware/simulation/testbench/../../../hardware/src/iob_cache_axi.v:8: Define or directive not defined: 'ADDR_W' parameter FE_ADDR_W = ADDR_W,
^~~~~~~
%Error: ../../../hardware/simulation/testbench/../../../hardware/src/iob_cache_axi.v:8: syntax error, unexpected ',', expecting TYPE-IDENTIFIER
parameter FE_ADDR_W = ADDR_W, ^ %Error: ../../../hardware/simulation/testbench/../../../hardware/src/iob_cache_axi.v:9: Define or directive not defined: 'DATA_W'
parameter FE_DATA_W = DATA_W, ^~~~~~~ %Error: ../../../hardware/simulation/testbench/../../../hardware/src/iob_cache_axi.v:9: syntax error, unexpected ',', expecting TYPE-IDENTIFIER parameter FE_DATA_W = DATA_W,
^
%Error: ../../../hardware/simulation/testbench/../../../hardware/src/iob_cache_axi.v:11: syntax error, unexpected parameter, expecting IDENTIFIER
parameter BE_DATA_W = DATA_W, ^~~~~~~~~ %Error: ../../../hardware/simulation/testbench/../../../hardware/src/iob_cache_axi.v:11: Define or directive not defined: 'DATA_W'
parameter BE_DATA_W = DATA_W, ^~~~~~~ %Error: ../../../hardware/simulation/testbench/../../../hardware/src/iob_cache_axi.v:11: syntax error, unexpected ',', expecting TYPE-IDENTIFIER parameter BE_DATA_W = DATA_W,
^
%Error: ../../../hardware/simulation/testbench/../../../hardware/src/iob_cache_axi.v:13: syntax error, unexpected parameter, expecting IDENTIFIER
parameter NLINES_W = 7,
^~~~~~~~~
%Error: ../../../hardware/simulation/testbench/../../../hardware/src/iob_cache_axi.v:14: syntax error, unexpected parameter, expecting IDENTIFIER
parameter WORD_OFFSET_W = 3,
^~~~~~~~~
%Error: ../../../hardware/simulation/testbench/../../../hardware/src/iob_cache_axi.v:15: syntax error, unexpected parameter, expecting IDENTIFIER
parameter WTBUF_DEPTH_W = 5,
^~~~~~~~~
%Error: ../../../hardware/simulation/testbench/../../../hardware/src/iob_cache_axi.v:16: syntax error, unexpected parameter, expecting IDENTIFIER
parameter REP_POLICY = 1,
^~~~~~~~~
%Error: ../../../hardware/simulation/testbench/../../../hardware/src/iob_cache_axi.v:17: syntax error, unexpected parameter, expecting IDENTIFIER
parameter WRITE_POL = 0,
^~~~~~~~~
%Error: ../../../hardware/simulation/testbench/../../../hardware/src/iob_cache_axi.v:18: syntax error, unexpected parameter, expecting IDENTIFIER
parameter CTRL_CACHE = 0,
^~~~~~~~~
%Error: ../../../hardware/simulation/testbench/../../../hardware/src/iob_cache_axi.v:19: syntax error, unexpected parameter, expecting IDENTIFIER
parameter CTRL_CNT = 0,
^~~~~~~~~
%Error: ../../../hardware/simulation/testbench/../../../hardware/src/iob_cache_axi.v:22: syntax error, unexpected parameter, expecting IDENTIFIER
parameter FE_NBYTES = FE_DATA_W/8,
^~~~~~~~~
%Error: ../../../hardware/simulation/testbench/../../../hardware/src/iob_cache_axi.v:23: syntax error, unexpected parameter, expecting IDENTIFIER
parameter FE_NBYTES_W = $clog2(FE_NBYTES),
^~~~~~~~~
%Error: ../../../hardware/simulation/testbench/../../../hardware/src/iob_cache_axi.v:24: syntax error, unexpected parameter, expecting IDENTIFIER
parameter BE_NBYTES = BE_DATA_W/8,
^~~~~~~~~
%Error: ../../../hardware/simulation/testbench/../../../hardware/src/iob_cache_axi.v:25: syntax error, unexpected parameter, expecting IDENTIFIER
parameter BE_NBYTES_W = $clog2(BE_NBYTES),
^~~~~~~~~
%Error: ../../../hardware/simulation/testbench/../../../hardware/src/iob_cache_axi.v:26: syntax error, unexpected parameter, expecting IDENTIFIER
parameter LINE2BE_W = WORD_OFFSET_W-$clog2(BE_DATA_W/FE_DATA_W),
^~~~~~~~~
%Error: ../../../hardware/simulation/testbench/../../../hardware/src/iob_cache_axi.v:29: syntax error, unexpected parameter, expecting IDENTIFIER
parameter AXI_ID_W = 1,
^~~~~~~~~
%Error: ../../../hardware/simulation/testbench/../../../hardware/src/iob_cache_axi.v:30: syntax error, unexpected parameter, expecting IDENTIFIER
parameter [AXI_ID_W-1:0] AXI_ID = 0
^~~~~~~~~
%Error: ../../../hardware/simulation/testbench/../../../hardware/src/iob_cache_axi.v:31: syntax error, unexpected ')', expecting ';'
)
^
%Error: ../../../hardware/simulation/testbench/../../../hardware/src/iob_cache_axi.v:69: syntax error, unexpected assign
assign invalidate_out = ctrl_invalidate | invalidate_in;
^~~~~~
%Error: ../../../hardware/simulation/testbench/../../../hardware/src/iob_cache_axi.v:128: syntax error, unexpected IDENTIFIER
iob_cache_memory
^~~~~~~~~~~~~~~~
%Error: Exiting due to 24 error(s)
make[1]: *** [Makefile:18: run] Error 1
make[1]: Leaving directory '/home/Work/21May/iob-cache/hardware/simulation/verilator'
make: *** [Makefile:9: sim] Error 2

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goforit19 avatar goforit19 commented on July 20, 2024

Above error with latest state of branch "doc"
Commit - documents can't be generated before core is clean

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jjts avatar jjts commented on July 20, 2024

That is right, branch doc is WIP -- we need to change the code to write the doc. For the moment only branch master works.

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goforit19 avatar goforit19 commented on July 20, 2024

So, which commit can be taken as working commit on branch "doc" to continue working with the simple read/write test case provided.

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jjts avatar jjts commented on July 20, 2024

Please use the branch HEAD

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jjts avatar jjts commented on July 20, 2024

Hi, documentation can now be generated on branch build-lib.

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