This project aims to provide LED blinking examples for all the FPGA dev boards in the world.
The goal is to provide a quick way to test your new FPGA board and get acquainted with using FuseSoC in your design flow.
Each FPGA board is implemented as a separate FuseSoC target and users are highly encouraged to add support for their any board at their disposal so that we can have a large collection.
This project is available in the FuseSoC base library, so if you have FuseSoC installed, you likely already have this project as well.
To check if it's available run fusesoc list-cores
and check for a core called fusesoc:utils:blinky
.
If it's not there, try to run fusesoc library update
to refresh the core libraries and look again.
If it's still not there, or if you want to modify the project, e.g. to add support for an additional board, you can add LED to believe as a new core library.
Clone the repo somewhere git clone https://github.com/fusesoc/blinky
.
Create an empty workspace directory somewhere and navigate there.
In your workspace directory, either run fusesoc library add blinky /path/to/repo
to have it available when running from this workspace, or fusesoc library add --global blinky /path/to/repo
to have it available in all workspaces
If you just want to have it available temporarily, run with --cores-root=/path/to/repo ...
as the first argument to FuseSoC
To build for your particular board, run fusesoc run --target=<board> fusesoc:utils:blinky
where <board>
is one of the boards listed in the Board support section below.
Alternatively, run fusesoc core-info fusesoc:utils:blinky
to find all available targets.
There is also a simulation target available to test the core without any hardware. To use this, run fusesoc run --target=sim fusesoc:utils:blinky
.
The simulation target has a number of target-specific configuration parameters that can be set. All target-specific parameters goes on the end of the command line (after the core name).
To list all simulation parameters, run fusesoc run --target=sim fusesoc:utils:blinky --help
.
Example: To run four pulses with a simulated clock frequency of 4MHz and creating a VCD file, run fusesoc run --target=sim fusesoc:utils:blinky --pulses=4 --clk_freq_hz=4000000 --vcd
.
The default simulator to use is Icarus Verilog, but other simulators can be used by setting the --tool
parameter after the run
command.
Currently supported simulators for this target are icarus, modelsim and xsim. To use e.g. modelsim run fusesoc run --target=sim --tool=modelsim fusesoc:utils:blinky
.
The following boards are currently supported:
https://www.arrow.com/en/products/tei0001-03-16-c8/trenz-electronic-gmbh
http://www.armadeus.org/wiki/index.php?title=APF27
https://alhambrabits.com/alhambra/
https://store.digilentinc.com/arty-a7-artix-7-fpga-development-board-for-makers-and-hobbyists/
https://fr.aliexpress.com/item/32281130824.html
https://shop.trenz-electronic.de/en/TEI0003-02-CYC1000-with-Cyclone-10-FPGA-8-MByte-SDRAM
https://https://github.com/tomverbeure/cisco-hwic-3g-cdma
https://www.terasic.com.tw/cgi-bin/page/archive.pl?No=593
https://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=165&No=836
https://www.latticesemi.com/en/Products/DevelopmentBoardsAndKits/ECP5EvaluationBoard
https://www.olimex.com/wiki/ICE40HX1K-EVB
http://www.latticesemi.com/en/Products/DevelopmentBoardsAndKits/iCE40HX8KBreakoutBoard.aspx
https://www.latticesemi.com/en/Products/DevelopmentBoardsAndKits/MachXO2BreakoutBoard
https://www.latticesemi.com/products/developmentboardsandkits/machxo3lfstarterkit
https://shop.trenz-electronic.de/en/TEI0001-03-08-C8-MAX1000-IoT-Maker-Board-8KLE-8-MByte-RAM
https://store.digilentinc.com/nexys-a7-fpga-trainer-board-recommended-for-ece-curriculum
https://reference.digilentinc.com/reference/programmable-logic/nexys-video/start
http://www.armadeus.org/wiki/index.php?title=OPOS6UL_SP
http://pipistrello.saanlima.com/index.php?title=Welcome_to_Pipistrello
https://wiki.seeedstudio.com/Spartan-Edge-Accelerator-Board/
https://www.crowdsupply.com/tinyfpga/tinyfpga-bx
ULX3S comes in different sizes. The targets ulx3s_45
and ulx3s_85
are defined for different FPGA sizes
http://www.hseda.com/product/xilinx/XC6SLX9COREV1.0/XC6SLX9CORE.htm
https://www.xilinx.com/products/boards-and-kits/zcu102.html
https://www.xilinx.com/products/boards-and-kits/zcu106.html
https://store.digilentinc.com/zybo-z7-zynq-7000-arm-fpga-soc-development-board/
Zybo Z7 comes with two variants of the Zynq SoC. The targets zybo_z7-10
and zybo_z7-20
are defined for different SoC configurations.