A digital clock with an alarm feature implemented using Verilog is presented in this paper. The clock design can be fully implemented on an FPGA. The module outputs the time in an HH-MM-SS (Hour-Minute-Second) format along with an alarm indicator, which gets set to HIGH when the clock reaches the time set by the user before. A test bench was also made along with the aforementioned. The design was tested on this test bench using Icarus Verilog, and simulated using GTK-Wave

• Real time Digital Clock
• Can be Systhesized with FPGA design
• Used as an alarm in time-sensetive systems

For Ubuntu :

$   sudo apt-get update
$   sudo apt-get install iverilog gtkwave

$   sudo apt install -y git
$   git clone https://github.com/hypnotic2402/iiitb_digAClock
$   cd iiitb_digAClock
$   iverilog iiitb_clock.v iiitb_aclock_tb.v
$   ./a.out
$   gtkwave test.vcd

Results obtained on testing alarm clock against the test-bench:

Run below commands to generate netlist :

iverilog -DFUNCTIONAL -DUNIT_DELAY=#1 primitives.v sky130_fd_sc_hd.v synth.v iiitb_aclock_tb.v -o synthNew
./synthNew
gtkwave test.vcd

The waveforms generated by this are the same as the ones found in the RTL design. (O_1 = O_2)

• Saket Gurjar
• Kunal Ghosh

• Kunal Ghosh, Director, VSD Corp. Pvt. Ltd.

• Saket Gurjar, IMTech 2020, International Institute of Information Technology, Bangalore : [email protected]
• Kunal Ghosh, Director, VSD Corp. Pvt. Ltd. [email protected]

https://www.fpga4student.com/2016/11/verilog-code-for-alarm-clock-on-fpga.html