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stm32_minismartcar

基于stm32的遥控wifi循迹避障智能小车源程序

tdc

Verilog implementation of a tapped delay line TDC

tdc-core

A 26ps RMS time-to-digital converter (TDC) core for Spartan-6 FPGAs

team-pain

Main Branch of Project

tifr_fpga_tdc

Time to Digital Converter on an FPGA

udmabuf

User space mappable dma buffer device driver for Linux.

uvispace-camera-fpga

Uvispace FPGA Camera for DE1-SoC and DE0-nano-SoC boards

v3edu

test of v3edu FPGA train

various_mcu_debugger_diy

各种LInk大合集

velodyne

ROS support for Velodyne 3D LIDARs

video-bilateral-filter-fpga-verilog

visionertech_vmg-prov_fpga

This is a Visionertech VMG-PROV FPGA project

vitis-tutorials

vitis_libraries

Vitis Libraries

xilinx_axidma

A zero-copy Linux driver and a userspace interface library for Xilinx's AXI DMA and VDMA IP blocks. These serve as bridges for communication between the processing system and FPGA programmable logic fabric, through one of the DMA ports on the Zynq processing system. Distributed under the MIT License.

zynq-axi-dma-sg

Simple C snippet to transfer DMA memory with scatter/gather on a Zynq 7020

zynq-uflow

Linux UIO Driver for the Zynq AXI4Lite interface

zynq_tdc

A fast high-resolution time-to-digital converter in the Red Pitaya Zynq-7010 SoC