32-verilog-mini-projects

Implementing 32 Verilog Mini Projects. 32 bit adder, Array Multiplier, Barrel Shifter, Binary Divider 16 by 8, Booth Multiplication, CRC Coding, Carry Select and Carry Look Ahead Adder, Carry Skip and Carry Save Adder, Complex Multiplier, Dice Game, FIFO, Fixed Point Adder and Subtractor, Fixed Point Multiplier and Divider, Floating Point IEEE 754 Addition Subtraction, Floating Point IEEE 754 Division, Floating Point IEEE 754 Multiplication, Fraction Multiplier, High Radix Multiplier, I2C and SPI Protocols, LFSR and CFSR, Logarithm Implementation, Mealy and Moore State Machine Implementation of Sequence Detector, Modified Booth Algorithm, Pipelined Multiplier, Restoring and Non Restoring Division, Sequential Multiplier, Shift and Add Binary Multiplier, Traffic Light Controller, Universal_Shift_Register, BCD Adder, Dual Address RAM and Dual Address ROM

async_fifo

This asynchrounous FIFO deisgn and UVM verificaiton is one case study of me. The design is based on Cliff Cumming's paper and the UVM is coded by me(Xianghzi Meng)

awesome-hardware-tools

List of awesome open source hardware tools

awesome-hdl

Hardware Description Languages

awesome-opensource-asic-resources

awesome-opensource-hardware

List of awesome open source hardware projects

awesome-semiconductor-startups

List of awesome semiconductor startups

blood-donation-system

I worked on a project which deals with blood donation system.

computer-engineering-resources

A curated list of Computer Engineering resources

covid-19

COVID-19

crop-management-system

I have worked on a crop management system

deepcomp

Dynamic multi-cell selection for cooperative multipoint (CoMP) using (multi-agent) deep reinforcement learning

deeplearning-models

A collection of various deep learning architectures, models, and tips

example.github.io

Personal Webpage

face-detection-and-tracking

Worked on centroid tracking algorithm and also uses a pre-trained OpenCV's deep learning face detection model to detect multiple faces in video stream through webcam and also assign them a unique ID no.

fpu

32-Bit Algorithms of Floating Point Operations are implemented on Verilog with logic Operations.

fpu-1

synthesiseable ieee 754 floating point library in verilog

fpu-ieee-754

My take on implementing Single precision Floating Point Division and Square Root

fund-transfer-system

I worked on a project dealing with the fund transfer system in a bank.

gem5-bootcamp-env

Gem5 BootCamp. Peer pressure me aake fork kiya :(

heyshakya.github.io

My official SHOW OFF repository here I will show off, brag and look down others please follow me.

ieee-template-latex

Modelo em latex para relatórios que utilizam o formato IEEE

iris_arm

A simulation of 4-DOF robotic arm in gazebo, using ROS.

lfd111x

This repository contains the work done during learning LinuxFoundationX LFD111x Building a RISC-V CPU Core

mcq-paper-generating-project

mdw21

Design of 6T, 8T and 10T SRAM Cells with Static Noise Margin Analysis

mlscv

This GitHub Repository contains all the source codes for exercises and case studies for course Machine Learning for Speech and Computer Vision

moderncv

A modern curriculum vitae class for LaTeX

multiple-object-tracking

Worked on different algorithms to track multiple selected object in a webcam stream or video using OpenCV and Python.

object-tracking-using-camshift

Worked on Camshift algorithm to track selected object in a webcam stream or video using OpenCV and Python.