Comments (8)
Are you running with default riscv_rand_jump_test setting? or with increased sub-programs count?
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the same as defined in tests.yaml
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It takes me 1 minute to generate 10 tests with VCS. but irun seems to be much slower. Let me do a profiling with irun and see what can be improved.
Thu, 05 Sep 2019 10:58:27 INFO Running RISC-V instruction generator
Thu, 05 Sep 2019 10:58:27 INFO Generating 10 riscv_rand_jump_test
Thu, 05 Sep 2019 10:59:27 INFO Compiling vcs_sim/asm_tests/riscv_rand_jump_test.0.S
....
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I ran the same command, compiling w/o "-access" - got 15 min 20 sec
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With #120 , I can see performance improvement around 60%. It's now taking around 4 mins to generate 10 tests, down from 10 mins. It's still 4x slower than VCS, need to explore more coding style changes to further improve performance.
Thu, 05 Sep 2019 20:53:33 INFO Found matching simulator: ius
Thu, 05 Sep 2019 20:53:33 INFO Building RISC-V instruction generator
Thu, 05 Sep 2019 20:53:52 INFO Running RISC-V instruction generator
Thu, 05 Sep 2019 20:53:52 INFO Generating 10 riscv_rand_jump_test
Thu, 05 Sep 2019 20:57:47 INFO Compiling out_2019-09-05/asm_tests/riscv_rand_jump_test.0.S
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Down to 1 minute now... (I also reduced the instruction count for this test by 1/3 because it could generate a very long test when there's a lot of jumps between sub programs)
Thu, 05 Sep 2019 23:22:11 INFO Generating 10 riscv_rand_jump_test
Thu, 05 Sep 2019 23:23:14 INFO Compiling out_2019-09-05/asm_tests/riscv_rand_jump_test.0.S
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Can you verify if this solves your problem? There are still some tests (riscv_mmu_stress_test) takes longer time (30s) to generate with ius, I will further look into it.
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Oh, it runs much faster now! I got 20 tests for 1m 21s, thanks a lot, again
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Related Issues (20)
- Definition of Functional Coverage
- VCS2018:Incompatible complex type HOT 3
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- [cfg,gpr] reg constraint in riscv_gen_config. HOT 1
- [page table] There is a error in page table !
- kIllegalCompressedOpcode generates valid instruction (```c.fswsp```) when XLEN=32 HOT 1
- CRITICAL Cannot randomize branch target instruction HOT 1
- vfwcvt.xu.f.v issue
- SEW=16 vfcvt/vfwcvt instruction
- pygen requirements installation failure HOT 4
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