Comments (9)
gf180mcu_fd_sc_mcu9t5v0__antennaDIFFAREA should be ANTENNADIFFAREA instead.
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Somehow ANTENNA was replaced by with the antenna cell name, perhaps a TCL scope variable override issue?
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Nice catch, we'll get a fix in.
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This is essentially a duplicate of #104, since the same string replacement caused both.
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I believe this is fixed by google/globalfoundries-pdk-libs-gf180mcu_fd_sc_mcu9t5v0#23
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google/globalfoundries-pdk-libs-gf180mcu_fd_sc_mcu9t5v0#23 was merged. Can this be closed?
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Can I get these changes into the gfmpw-0d Caravel branch, or will this go into a different branch (which one?), or is there another way to get this fix into a repo with gfmpw-0d ?
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This fix has been in open_pdks since three weeks ago, and by extension should be in volare. It does not specifically "go into" the caravel repository, although the various commit numbers recorded for the library repositories should all be up-to-date.
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Related Issues (20)
- Standard cell reference missing for DLATCH in gf180 PDK HOT 6
- CLASS options wrong in LEF files HOT 6
- CLASS core confusion HOT 8
- "View" and "Edit" links in documentation don't work HOT 1
- Missing "Generated Layer and Generation rules" section
- Missing design rules? HOT 5
- incorrect diagram in lvs_bjt page
- Create OpenRCX enablement HOT 1
- Resistor Model issue
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- Standard cell page in the docs is broken HOT 7
- MOSFET Multipliers not accounted for, in SPICE Simulation HOT 13
- How to use gf180mcu-pdk into openlane flow? HOT 10
- Missing Blocker Label to identify show stoppers for progress on platform against this Repo HOT 1
- Update ngspice regression tests README to include information about how to interpret the results HOT 1
- Update xyce regression tests README to include information about how to interpret the results HOT 1
- sdff* cells are not parseable by yosys HOT 1
- Create corner tech lefs with updated via/layer resistances
- Public DRM does not render correctly, is hard to navigate HOT 1
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