Comments (6)
Current solution:
I add a latch_map.v in "pdks/gf180mcuC/libs.tech/openlane/gf180mcu_fd_sc_mcu7t5v0/":
module \$_DLATCH_P_ (input E, input D, output Q);
gf180mcu_fd_sc_mcu7t5v0__latq_1 _TECHMAP_DLATCH_P (
.D(D),
.Q(Q),
.GATE(E)
);
endmodule
module \$_DLATCH_N_ (input E, input D, output Q);
gf180mcu_fd_sc_mcu7t5v0__latrnq_1 _TECHMAP_DLATCH_N (
.D(D),
.Q(Q),
.GATE_N(E)
);
endmodule
At present, I can successfully pass the floorplan. Is this the right addition? thank you.
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Thanks for the suggestion. I'll have to check what Yosys is looking for when it comes to auto mapping latches. It might be as simple as the liberty file not putting the latch function in quotes
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Looks like yosys might not have support for latches YosysHQ/yosys#1221
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Yes, I agree with you very much. This is not supported by Yosys.
In skywater130 pdk, I can find the mapping files in thesky130A/libs.tech/openlane/sky130_fd_sc_hd
(I use sky130_fd_sc_hd as an example): such as latch_map.v,mux_map.v, etc.
So I think in the GF180PDK, it may also be necessary to provide themapping files? This will be very helpful. Thank you.
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Agreed. @RTimothyEdwards should this be added to the openpdks tech mapping file?
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The openlane development team needs to provide me with the set of mapping files.
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