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I found this lines in sse2 and ssse3 sipcompress macro implementation:

v13 = _mm_unpacklo_epi64(v11, v33);
v13 = _mm_unpacklo_epi64(v11, v33); \

Looks like its make no sense to write it twice. So it's just a typo or I can't understand something?

in test.c, shouldn't the loop read:

for (len = 1; len <= 1024; len++) {

instead of:

for (len = 1; len < 1024; len++) {

?

This code looks wrong:

        __asm__ __volatile__("rdtsc" : "=a" (lo), "=d" (hi));

Snippet from this paper http://download.intel.com/embedded/software/IA/324264.pdf :

Starting with the Intel Pentium processor, most Intel CPUs support out-of-order execution of the code. The purpose is to optimize the penalties due to the different instruction latencies. Unfortunately this feature does not guarantee that the temporal sequence of the single compiled C instructions will respect the sequence of the instruction themselves as written in the source C file. When we call the RDTSC instruction, we pretend that that instruction will be executed exactly at the beginning and at the end of code being measured (i.e., we don’t want to measure compiled code executed outside of the RDTSC calls or executed in between the calls themselves).